cuhk-eda / GCS-TimerLinks
☆24Updated 3 months ago
Alternatives and similar repositories for GCS-Timer
Users that are interested in GCS-Timer are comparing it to the libraries listed below
Sorting:
- GPU-based logic synthesis tool☆90Updated 2 months ago
- Hypergraph Partitioning: benchmarks, evaluators, best known solutions and codes☆72Updated 4 months ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆139Updated 3 months ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆105Updated last year
- The first version of TritonPart☆29Updated last year
- ☆39Updated 2 years ago
- ☆14Updated last year
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆77Updated last year
- Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".☆59Updated 3 months ago
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".☆52Updated 3 months ago
- ☆47Updated last year
- ☆34Updated 4 years ago
- ☆20Updated 10 months ago
- [ICCAD 22]DeePEB: A neural network based PEB solver☆11Updated 2 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆132Updated last year
- Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)☆17Updated 2 years ago
- ☆11Updated last year
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆30Updated 3 years ago
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆50Updated 9 months ago
- ☆87Updated 3 months ago
- Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)☆43Updated 6 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆179Updated 4 months ago
- ☆29Updated last year
- Collection of digital hardware modules & projects (benchmarks)☆62Updated 3 weeks ago
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆50Updated 11 months ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆85Updated 5 months ago
- A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…☆34Updated 2 months ago
- ☆34Updated 4 years ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆139Updated 2 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆137Updated 2 years ago