Alternatives and similar repositories for 2024_ICCAD_Contest_Gate_Sizing_Benchmark

Users that are interested in 2024_ICCAD_Contest_Gate_Sizing_Benchmark are comparing it to the libraries listed below

• NVlabs / CircuitOps
  ☆91Updated 3 months ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆43Updated last year
• ieee-ceda-datc / datc-rdf-Metrics4ML
  ☆31Updated 3 years ago
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆57Updated 8 months ago
• NVlabs / INSTA
  ☆87Updated 3 months ago
• IntelLabs / FloorSet
  ☆77Updated 3 months ago
• NYU-MLDA / OpenABC
  OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…
  ☆132Updated 2 months ago
• ASU-VDA-Lab / ASP-DAC24-Tutorial
  This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024
  ☆52Updated 8 months ago
• CODA-Team / AnalogGym
  ☆61Updated 3 weeks ago
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆56Updated 4 months ago
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆77Updated last year
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆139Updated 2 years ago
• zslwyuan / AutoCellLibX
  AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining
  ☆17Updated 2 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆62Updated 3 weeks ago
• TILOS-AI-Institute / MLCAD-2023-FPGA-Macro-Placement-Contest
  ☆31Updated last year
• Ravenslofty / librecell
  ☆25Updated 4 years ago
• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆156Updated 5 months ago
• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆52Updated 3 months ago
• TimingPredict / Dataset
  Timing prediction dataset download and instructions.
  ☆15Updated 2 years ago
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆139Updated 3 months ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆75Updated 7 years ago
• laiyao1 / AnalogCoder
  ☆85Updated last month
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆105Updated last year
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆39Updated 5 years ago
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆179Updated 4 months ago
• CODA-Team / AncstrGNN_benchmark
  Analog IC symmetry extraction benchmark of AncstrGNN
  ☆10Updated last year
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆90Updated last month
• geziangfinn / easyPlace
  Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS
  ☆50Updated 11 months ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆132Updated last year