Tonanguyxiro / HKUST-GZ_RBM_Research_Proposal
☆27Updated 10 months ago
Related projects ⓘ
Alternatives and complementary repositories for HKUST-GZ_RBM_Research_Proposal
- ☆38Updated 4 months ago
- ☆31Updated last month
- ArkVale: Efficient Generative LLM Inference with Recallable Key-Value Eviction (NIPS'24)☆17Updated last week
- [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning☆76Updated 2 months ago
- ChatEDA: A Large Language Model Powered Autonomous Agent for EDA☆16Updated 4 months ago
- Facilitating selective network routing for Ivanti-connected devices to a school's network, using port forwarding for enhanced access cont…☆9Updated 7 months ago
- ☆20Updated 6 months ago
- This is a repo to store circuit design datasets☆15Updated 10 months ago
- GARNET: Reduced-Rank Topology Learning for Robust and Scalable Graph Neural Networks☆35Updated last year
- This is a python repo for flattening Verilog☆13Updated last month
- ☆14Updated 11 months ago
- ☆15Updated 2 years ago
- Repository for artifact evaluation of ASPLOS 2023 paper "SparseTIR: Composable Abstractions for Sparse Compilation in Deep Learning"☆23Updated last year
- LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models☆19Updated 2 years ago
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆17Updated 3 weeks ago
- The official implementation of WSDM'24 paper <DeSCo: Towards Generalizable and Scalable Deep Subgraph Counting>☆15Updated 8 months ago
- Automatic generation of architecture-level models for hardware from its RTL design.☆12Updated last year
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆22Updated 2 months ago
- LLM4HWDesign Starting Toolkit☆17Updated last month
- Must-read papers on Graph Neural Networks (GNNs) for Integrated Circuits (ICs) design, security and reliability. This collection of paper…☆40Updated last year
- [FPGA 2023] FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs☆23Updated last year
- Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization☆17Updated 4 months ago
- PyTorch compilation tutorial covering TorchScript, torch.fx, and Slapo☆19Updated last year
- MobiSys#114☆21Updated last year
- Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework (DAC 2024)☆21Updated 4 months ago
- tutorial for writing custom pytorch cpp+cuda kernel, applied on volume rendering (NeRF)☆21Updated 11 months ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆37Updated last year
- Simple Python interface for ABC☆23Updated last year
- Polynormer: Polynomial-Expressive Graph Transformer in Linear Time☆36Updated 7 months ago