Alternatives and similar repositories for Verilog-Practice:

Users that are interested in Verilog-Practice are comparing it to the libraries listed below

• openFPGA666 / FpgaGuide
  分享FPGA开发知识、优秀文章、学习网站以及开源项目。本项目收集了github中许多FPGA开源项目。
  ☆489Updated last year
• viduraakalanka / HDL-Bits-Solutions
  This is a repository containing solutions to the problem statements given in HDL Bits website.
  ☆336Updated last year
• sin-x / FPGA
  数字IC相关资料
  ☆1,037Updated 4 years ago
• pConst / basic_verilog
  Must-have verilog systemverilog modules
  ☆1,691Updated 2 months ago
• WangXuan95 / Xilinx-FPGA-PCIe-XDMA-Tutorial
  Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
  ☆511Updated last year
• Nitcloud / Digital-IDE
  在vscode上的数字设计开发插件
  ☆344Updated last year
• xupsh / Digital-Design-Lab
  ☆212Updated 3 years ago
• alexforencich / verilog-axi
  Verilog AXI components for FPGA implementation
  ☆1,583Updated last year
• riscv-mcu / e203_hbirdv2
  The Ultra-Low Power RISC-V Core
  ☆1,363Updated 3 months ago
• dumpo / digital_IC_design_notes
  数字IC设计 学习笔记
  ☆124Updated 2 years ago
• omarelhedaby / CNN-FPGA
  Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database
  ☆434Updated 3 years ago
• xupsh / pp4fpgas-cn
  中文版 Parallel Programming for FPGAs
  ☆714Updated 4 months ago
• adki / AMBA_AXI_AHB_APB
  AMBA bus lecture material
  ☆397Updated 4 years ago
• suisuisi / FPGAandCNN
  基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现
  ☆287Updated last year
• CustomizableComputingLab / CustomizableComputingLab.github.io
  ☆139Updated last month
• alexforencich / verilog-pcie
  Verilog PCI express components
  ☆1,183Updated 8 months ago
• QShen3 / CNN-FPGA
  使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用
  ☆515Updated 6 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆193Updated last year
• HonkW93 / automatic-verilog
  automatic-verilog based on vimscript
  ☆248Updated last year
• doonny / basic_knowledge
  Things to learn for new students in the Lab for AI chips and systems of BJTU .
  ☆181Updated 2 months ago
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆178Updated 5 months ago
• ultraembedded / cores
  Various HDL (Verilog) IP Cores
  ☆725Updated 3 years ago
• Digital-EDA / Digital-IDE
  All in one vscode plugin for HDL development
  ☆444Updated this week
• WangXuan95 / USTC-RVSoC
  An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V SoC，包含一个RV32I CPU、一个简单可扩展的总线、一些外设。
  ☆370Updated last year
• cxlisme / FPGA-proj
  FPGA project
  ☆203Updated 2 years ago
• Starrynightzyq / Nexys4DDR-ARM-M3-Plate-Recognition
  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛
  ☆131Updated 5 years ago
• freechipsproject / chisel-bootcamp
  Generator Bootcamp Material: Learn Chisel the Right Way
  ☆1,000Updated 4 months ago
• pulp-platform / axi
  AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
  ☆1,181Updated this week
• dtysky / FPGA-Imaging-Library
  An open source library for image processing on FPGA.
  ☆566Updated 9 years ago
• Daniel-GGB / My-Digital-IC-Library
  我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
  ☆75Updated 3 years ago