My solution to the problem set on HDLBits.
☆28Aug 6, 2020Updated 6 years ago
Alternatives and similar repositories for HDLBits_Solution
Users that are interested in HDLBits_Solution are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 32-bit Wallace and Dadda Tree Multiplier☆14Jun 26, 2020Updated 6 years ago
- UC Berkeley CS150 Final Project: Face Tracking and Real-Time Ray Tracing implemented in a FPGA☆10May 3, 2013Updated 13 years ago
- Logic Input Triggered High-resolution Pulser☆13Mar 24, 2020Updated 6 years ago
- Implementing a five-stage pipeline RSIC-V architecture (RV32I Core instruction set) using Verilog HDL. All the functional modules require…☆37Aug 12, 2020Updated 6 years ago
- Radix-4 1024 point fft in verilog☆12Apr 29, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Apr 11, 2023Updated 3 years ago
- Desk_Screen composed with ESP32 and Epaper☆17Dec 26, 2022Updated 3 years ago
- ☆18Jun 13, 2022Updated 4 years ago
- ☆14Jul 17, 2020Updated 6 years ago
- ☆10Mar 11, 2022Updated 4 years ago
- Audited open problems in quantum information theory, with recent progress and claim checks☆20Updated this week
- Micropython driver for ssd1680 e-ink display☆11May 29, 2023Updated 3 years ago
- ☆20Sep 16, 2022Updated 4 years ago
- Skeletal repository for GNU Radio WBFM implementation on Pynq board☆13Jun 15, 2017Updated 9 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Verilog design for hardware ray-caster game☆11Aug 14, 2023Updated 3 years ago
- All thing about SDRPi☆20Mar 17, 2023Updated 3 years ago
- ☆19Jan 5, 2020Updated 6 years ago
- This is a repository containing solutions to the problem statements given in HDL Bits website.☆379Jul 16, 2023Updated 3 years ago
- Convolutional Neural Networks Coprocessor☆12Dec 8, 2022Updated 3 years ago
- "Structured programming" macros for Gnu Assembler (gas)☆17Feb 23, 2026Updated 8 months ago
- Fast, compact floating point math for ARM Cortex-M0+ MCUs.☆14Jun 16, 2026Updated 4 months ago
- Repository for system verilog labs from cadence☆17Feb 9, 2020Updated 6 years ago
- ☆25Dec 8, 2021Updated 4 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- CheesecakeOS for Raspberry Pi Volume 0: Booting, Processes, and Virtual Memory☆12Aug 2, 2021Updated 5 years ago
- Branch Predictor Optimization for BlackParrot☆15Mar 24, 2024Updated 2 years ago
- A simple 8086-CPU simulator using Verilog and Quartus II☆12Jul 9, 2018Updated 8 years ago
- ARM11 group project; Atanas G., Norbert P., Daniel Z., Levente K.: MARIO KART☆13Mar 9, 2019Updated 7 years ago
- Dadda multiplier(8*8, 16*16, 32*32) in Verilog HDL.☆42Jun 6, 2024Updated 2 years ago
- ☆30Dec 24, 2023Updated 2 years ago
- A Python based 8085 assembler.☆13Feb 18, 2025Updated last year
- BrightEyes Time-tagging module: open-source hardware, a time to digital converter, multi channels, with a resolution of 30 ps designed fo…☆20Oct 30, 2023Updated 3 years ago
- A fast and space-efficient graph storage data structure.☆24May 27, 2026Updated 5 months ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- FPGA raycaster engine written in verilog☆16Apr 19, 2019Updated 7 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28May 11, 2022Updated 4 years ago
- Notes from learning RISC-V☆12Jun 30, 2026Updated 4 months ago
- PYNQ-Based MNIST with Tensorflow Lite☆21Feb 21, 2025Updated last year
- ✔️ Port of RISCOF to check NEORV32 for RISC-V ISA compatibility.☆38Feb 22, 2026Updated 8 months ago
- yolo3-keras的源码☆28Feb 24, 2020Updated 6 years ago
- FPGA Tetris written in Verilog☆16Apr 26, 2018Updated 8 years ago