Alternatives and similar repositories for 8-bits-RISC-CPU-Verilog:

Users that are interested in 8-bits-RISC-CPU-Verilog are comparing it to the libraries listed below

• peilin-chen / Zhulong-RISCV-CPU
  CPU Design Based on RISCV ISA
  ☆107Updated 10 months ago
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆146Updated 2 years ago
• CustomizableComputingLab / CustomizableComputingLab.github.io
  ☆144Updated last week
• shawn110285 / Cookabarra
  a training-target implementation of rv32im, designed to be simple and easy to understand
  ☆58Updated 3 years ago
• wataru030-XIAOHEI / My-RISCV64-CORE-writing
  一生一芯 ， ysyx ， npc . the repo of the YSYX project . a riscv-64 CPU . writing .
  ☆28Updated 2 years ago
• wuzeyou / Multiplier16X16
  Classic Booth Code, Wallace Tree, and SquareRoot Carry Select Adder
  ☆116Updated 12 years ago
• OSCPU / ysyxSoC
  ☆86Updated this week
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆43Updated 4 years ago
• gzzyyxh / Quafu
  A small SoC with a pipeline 32-bit RISC-V CPU.
  ☆63Updated 2 years ago
• VenciFreeman / RISC-V
  A simple RISC-V CPU written in Verilog.
  ☆62Updated 8 months ago
• cxdzyq1110 / NPU_on_FPGA
  在FPGA上面实现一个NPU计算单元。能够执行矩阵运算（ADD/ADDi/ADDs/MULT/MULTi/DOT等）、图像处理运算（CONV/POOL等）、非线性映射（RELU/TANH/SIGM等）。
  ☆237Updated 6 years ago
• xupsh / Digital-Design-Lab
  ☆218Updated 4 years ago
• yang-le / riscv_cpu
  a simple riscv cpu
  ☆22Updated 2 years ago
• Daniel-GGB / My-Digital-IC-Library
  我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
  ☆84Updated 3 years ago
• Evensgn / RISC-V-CPU
  RISC-V CPU with 5-stage pipeline, implemented in Verilog HDL.
  ☆279Updated 7 years ago
• siyueyinghua / UVMInPracticesByZhangQiang
  《UVM实战》书本源代码和UVM 1.1d源码及Doc
  ☆36Updated 4 years ago
• lizhirui / DreamCore
  ☆64Updated 2 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆199Updated last year
• dumpo / digital_IC_design_notes
  数字IC设计 学习笔记
  ☆134Updated 3 years ago
• lizhirui / AXI-SDCard-High-Speed-Controller
  A SDCard Controller Based AXI4 Bus with SDIO 4-wire 50MHz Mode(Max Rate 23MB/s)
  ☆118Updated 2 years ago
• Starrynightzyq / Nexys4DDR-ARM-M3-Plate-Recognition
  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛
  ☆137Updated 5 years ago
• BigPig-Bro / udp_gmii_ov5640
  本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛（高云赛道）项目，题目基于高云FPGA的多路网络视频监控编码系统。
  ☆45Updated last year
• riscv-mcu / hbird-sdk
  OpenSource HummingBird RISC-V Software Development Kit
  ☆155Updated last year
• 9334swjtu / PYNQ_softmax
  achieve softmax in PYNQ with heterogeneous computing.
  ☆63Updated 6 years ago
• jasonlin316 / RISC-V-CPU
  A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.
  ☆129Updated 5 years ago
• emwzq / example_uvm
  UVM实战随书源码
  ☆49Updated 6 years ago
• adki / AMBA_AXI_AHB_APB
  AMBA bus lecture material
  ☆432Updated 5 years ago
• kaitoukito / Integrated-Circuit-Textbooks
  Collect some IC textbooks for learning.
  ☆134Updated 2 years ago
• flyjancy / CortexM0_SoC
  Cortex M0 based SoC
  ☆73Updated 3 years ago
• Yawei-Ding / ysyx_riscv64_cpu
  ☆64Updated 2 years ago