viduraakalanka / HDL-Bits-Solutions
This is a repository containing solutions to the problem statements given in HDL Bits website.
☆315Updated last year
Related projects: ⓘ
- HDLBits website practices & solutions☆669Updated 8 months ago
- ☆133Updated last month
- AMBA bus lecture material☆365Updated 4 years ago
- Awesome ASIC design verification☆244Updated 2 years ago
- 在vscode上的数字设计开发插件☆318Updated last year
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆184Updated last year
- Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC …☆553Updated last month
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog☆243Updated 4 months ago
- Must-have verilog systemverilog modules☆1,600Updated 2 months ago
- automatic-verilog based on vimscript☆233Updated 10 months ago
- 数字IC设计 学习笔记☆110Updated 2 years ago
- ☆140Updated 3 years ago
- A DDR3 memory controller in Verilog for various FPGAs☆344Updated 2 years ago
- AMBA bus generator including AXI4, AXI3, AHB, and APB☆168Updated last year
- Verilog I2C interface for FPGA implementation☆515Updated 2 months ago
- AXI协议规范中文翻译版☆124Updated 2 years ago
- AMBA AXI VIP☆353Updated 2 months ago
- Verilog AXI components for FPGA implementation☆1,440Updated 9 months ago
- ☆230Updated 6 months ago
- ☆201Updated 3 years ago
- Vivado诸多IP,包括图像处理等☆157Updated last month
- Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核☆411Updated last year
- My solution to the problem set on HDLBits.☆20Updated 4 years ago
- CPU Design Based on RISCV ISA☆70Updated 3 months ago
- An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V CPU+SoC,包含一个简单且可扩展的外设总线。☆346Updated last year
- Repository for basic (and not so basic) Verilog blocks with high re-use potential☆541Updated 6 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆232Updated 3 years ago
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,048Updated last month
- Contains the code examples from The UVM Primer Book sorted by chapters.☆473Updated 2 years ago
- Verilog UART☆403Updated last year