xupsh / Digital-Design-Lab
☆218Updated 4 years ago
Alternatives and similar repositories for Digital-Design-Lab
Users that are interested in Digital-Design-Lab are comparing it to the libraries listed below
Sorting:
- 车牌识别,FPGA,2019全国大学生集成电路创新创业大赛☆138Updated 5 years ago
- ☆144Updated 2 weeks ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆236Updated 4 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆200Updated last year
- 《FPGA应用开发和仿真》(机械工业出版社2018年第1版 ISBN:9787111582786)的源码。Source Code of the book FPGA Application Development and Simulation(CHS).☆131Updated 6 months ago
- Vivado诸多IP,包括图像处理等☆208Updated 9 months ago
- AXI协议规范中文翻译版☆149Updated 2 years ago
- 数字IC设计 学习笔记☆135Updated 3 years ago
- Architecture and Verilog Implementation of 8-bits RISC CPU based on FSM. 基于有限状态机的8位RISC(精简指令集)CPU(中央处理器)简单结构和Verilog实现。☆145Updated 6 years ago
- 在vscode上的数字设计开发插件☆373Updated 2 years ago
- PYNQ学习资料☆164Updated 5 years ago
- 这是我所开发的两个项目,包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统☆89Updated 7 years ago
- ☆141Updated 4 years ago
- This repo includes 3 independent modules: UART receiver, UART transmitter, UART to AXI4 master. 本项目包含3个独立模块:UART接收器、UART发送器、UART转AXI4交互式调…☆202Updated last year
- FPGA☆123Updated 5 years ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆239Updated 6 years ago
- 包含了SOC设计中的通用IP,如外设、总线结构、基础、验证等☆93Updated this week
- ☆133Updated 10 years ago
- This is a repository containing solutions to the problem statements given in HDL Bits website.☆348Updated last year
- 基于FPGA的数字识别-实时视频处理的定点卷积神经网络实现☆325Updated 2 years ago
- Here are my solutions to HDLbits Verilog problem sets (HDLbits: https://hdlbits.01xz.net/wiki/Main_Page).☆88Updated last year
- 2018第二届全国大学生FPGA创新设计邀请赛的作品☆59Updated 6 years ago
- image processing based FPGA☆104Updated 3 years ago
- FPGA project☆220Updated 3 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆148Updated 2 years ago
- HDLBits website practices & solutions☆734Updated last year
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆179Updated last year
- Cortex M0 based SoC☆73Updated 3 years ago
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…☆106Updated 2 years ago
- 中文版 Parallel Programming for FPGAs☆728Updated 8 months ago