WangXuan95 / BSV_Tutorial_cnLinks
一篇全面的 Bluespec SystemVerilog (BSV) 中文教程,介绍了BSV的调度、FIFO数据流、多态等高级特性,展示了BSV相比于传统Verilog开发的优势。
☆573Updated last year
Alternatives and similar repositories for BSV_Tutorial_cn
Users that are interested in BSV_Tutorial_cn are comparing it to the libraries listed below
Sorting:
- An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V SoC,包含一个RV32I CPU、一个简单可扩展的总线、一些外设。☆406Updated last year
- 在vscode上的数字设计开发插件☆380Updated 2 years ago
- ☆194Updated 2 months ago
- An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码…☆256Updated 9 months ago
- Verilog implementation of fixed-point numbers, supports custom bit width, arithmetic, converting to float, with single cycle & pipeline v…☆190Updated last year
- AXI协议规范中文翻译版☆152Updated 2 years ago
- An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器,为低端FPGA嵌入式系统提供廉价、大容量的存储。☆181Updated last year
- An FPGA-based SD-card reader to read files from FAT16 or FAT32 formatted SD-cards. 基于FPGA的SD卡读取器,可以从FAT16或FAT32格式的SD卡中读取文件。☆303Updated last year
- 使用 Vivado+PetaLinux 为 Xilinx Zynq7 搭建 Linux 系统 —— 以 Zedboard 为例☆102Updated 9 months ago
- This repo includes 3 independent modules: UART receiver, UART transmitter, UART to AXI4 master. 本项目包含3个独立模块:UART接收器、UART发送器、UART转AXI4交互式调…☆215Updated last year
- Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核☆628Updated last year
- The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…☆107Updated 2 years ago
- 在FPGA上面实现一个NPU计算单元。能够执行矩阵运算(ADD/ADDi/ADDs/MULT/MULTi/DOT等)、图像处理运算(CONV/POOL等)、非线性映射(RELU/TANH/SIGM等)。☆247Updated 6 years ago
- Documentation for XiangShan☆417Updated this week
- A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog☆353Updated last year
- 关于RISC-V你所需要知道的一切☆561Updated 2 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆138Updated last year
- ☆163Updated last month
- ☆146Updated this week
- ☆151Updated 3 weeks ago
- AMBA bus lecture material☆441Updated 5 years ago
- ☆141Updated 4 years ago
- a training-target implementation of rv32im, designed to be simple and easy to understand☆60Updated 3 years ago
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆758Updated this week
- OpenSource HummingBird RISC-V Software Development Kit☆158Updated last year
- ☆64Updated 2 years ago
- Collect some IC textbooks for learning.☆146Updated 2 years ago
- An FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器,用来进行无损图像压缩。☆94Updated 9 months ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆202Updated last year
- Vivado诸多IP,包括图像处理等☆209Updated 10 months ago