thu-nics / awesome_ai4edaLinks
β274Updated 4 years ago
Alternatives and similar repositories for awesome_ai4eda
Users that are interested in awesome_ai4eda are comparing it to the libraries listed below
Sorting:
- πΉ OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkitβ155Updated 5 months ago
- Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open sourceβ284Updated 2 weeks ago
- This repo awesome-AI4EDA contains the source for the webpage: https://ai4eda.github.io, which is a curated paper list of awesome AI for Eβ¦β172Updated 3 months ago
- CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)β404Updated 2 months ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graphβ¦β133Updated 2 months ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimizationβ139Updated 3 months ago
- RePlAce global placement toolβ239Updated 5 years ago
- CUGR, VLSI Global Routing Tool Developed by CUHKβ139Updated 2 years ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)β77Updated last year
- β148Updated 2 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.β179Updated 4 months ago
- Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".β52Updated 3 months ago
- Machine Generated Analog IC Layoutβ255Updated last year
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BRβ¦β105Updated last year
- EDA wikiβ131Updated 6 months ago
- β34Updated 4 years ago
- β238Updated last year
- β58Updated 4 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHKβ137Updated 2 years ago
- β85Updated last month
- DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)β114Updated 2 years ago
- Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".β59Updated 3 months ago
- β31Updated last year
- ChiPBench:Benchmarking End-to-End Performance of AI-based Chip Placement Algorithmsβ44Updated 2 weeks ago
- VLSI EDA Global Routerβ75Updated 7 years ago
- β91Updated 3 months ago
- An open-source benchmark for generating design RTL with natural languageβ133Updated 11 months ago
- the awesome work, project and lab of EDA (Electronic Design Automation). continue update...β24Updated last year
- β61Updated 3 weeks ago
- Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)β43Updated 6 years ago