☆339Jan 13, 2026Updated last month
Alternatives and similar repositories for ALIGN-public
Users that are interested in ALIGN-public are comparing it to the libraries listed below
Sorting:
- Machine Generated Analog IC Layout☆270Apr 24, 2024Updated last year
- Intel's Analog Detailed Router☆40Jul 18, 2019Updated 6 years ago
- ☆162Dec 4, 2022Updated 3 years ago
- Fully Open Source FASOC generators built on top of open-source EDA tools☆315Oct 22, 2025Updated 4 months ago
- Circuit release of the MAGICAL project☆40Jan 10, 2020Updated 6 years ago
- Interchange formats for chip design.☆36Feb 15, 2026Updated 2 weeks ago
- Hardware Description Library☆87Feb 17, 2026Updated last week
- Analog Placement Quality Prediction☆25Mar 24, 2023Updated 2 years ago
- BAG2 workspace for fake PDK (cds_ff_mpt)☆59May 20, 2020Updated 5 years ago
- Hdl21 Schematics☆16Jan 24, 2024Updated 2 years ago
- LAYout with Gridded Objects v2☆67Jun 22, 2025Updated 8 months ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆72Updated this week
- Layout Symmetry Annotation for Analog Circuits with GraphNeural Networks☆16Apr 7, 2023Updated 2 years ago
- A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy an…☆444Feb 22, 2026Updated last week
- ☆18May 23, 2021Updated 4 years ago
- A tiny Python package to parse spice raw data files.☆53Dec 26, 2022Updated 3 years ago
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆129Feb 3, 2026Updated 3 weeks ago
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:☆677Feb 17, 2026Updated last week
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆395Updated this week
- ☆39Apr 10, 2023Updated 2 years ago
- The Xyce™ Parallel Electronic Simulator☆113Updated this week
- RePlAce global placement tool☆246Aug 13, 2020Updated 5 years ago
- Reinforcement learning assisted analog layout design flow.☆27Jun 17, 2024Updated last year
- GDSII File Parsing, IC Layout Analysis, and Parameter Extraction☆129Apr 23, 2023Updated 2 years ago
- ☆56Sep 30, 2023Updated 2 years ago
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆33Dec 25, 2025Updated 2 months ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆142Mar 20, 2023Updated 2 years ago
- Primitives for GF180MCU provided by GlobalFoundries.☆56Aug 28, 2023Updated 2 years ago
- ☆44Jan 26, 2020Updated 6 years ago
- Analog IC symmetry extraction benchmark of AncstrGNN☆10Aug 19, 2024Updated last year
- Circuit Automatic Characterization Engine☆52Feb 7, 2025Updated last year
- An automatic schematic generation tool which generates schematics from a SPICE netlist, usually of output from qflow.☆29Oct 25, 2020Updated 5 years ago
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆25Mar 11, 2023Updated 2 years ago
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆55Jun 30, 2017Updated 8 years ago
- IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively s…☆784Updated this week
- Magic VLSI Layout Tool☆618Feb 20, 2026Updated last week
- awesome-Analog-IC-Design-Automation☆46Apr 19, 2023Updated 2 years ago
- An open-source static random access memory (SRAM) compiler.☆1,012Jan 16, 2026Updated last month
- Primitives for GF180MCU provided by GlobalFoundries.☆12Jul 6, 2025Updated 7 months ago