pkuzjx / EDA-wiki
EDA wiki
☆116Updated 4 months ago
Related projects ⓘ
Alternatives and complementary repositories for EDA-wiki
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆97Updated 8 months ago
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆151Updated 4 years ago
- ☆99Updated 4 years ago
- An integrated CGRA design framework☆83Updated 2 weeks ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆76Updated 3 weeks ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆118Updated last month
- ☆38Updated 2 months ago
- ☆119Updated 3 years ago
- mflowgen -- A Modular ASIC/FPGA Flow Generator☆233Updated last month
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆20Updated last year
- ☆101Updated 4 months ago
- RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.☆156Updated last week
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆158Updated last year
- A Chisel RTL generator for network-on-chip interconnects☆177Updated this week
- This is a tutorial on standard digital design flow☆73Updated 3 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆113Updated last week
- Lab exercises for Chisel in the digital electronics 2 course at DTU☆176Updated 2 weeks ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆123Updated last year
- Material for OpenROAD Tutorial at DAC 2020☆46Updated last year
- high-performance RTL simulator☆140Updated 5 months ago
- A Standalone Structural Verilog Parser☆84Updated 2 years ago
- FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool☆77Updated last year
- INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.☆83Updated 4 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆147Updated last year
- Verilog parser, preprocessor, and related tools for the Verilog-Perl package☆121Updated 10 months ago
- IDEA project source files☆98Updated 2 weeks ago
- An Open-Source Tool for CGRA Accelerators☆57Updated 3 months ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆56Updated 10 months ago
- ☆37Updated 4 months ago