pkuzjx / EDA-wikiLinks
EDA wiki
☆133Updated 2 weeks ago
Alternatives and similar repositories for EDA-wiki
Users that are interested in EDA-wiki are comparing it to the libraries listed below
Sorting:
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆107Updated last year
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆160Updated 6 months ago
- ☆107Updated 5 years ago
- ☆208Updated 8 months ago
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆191Updated 5 years ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆58Updated 5 months ago
- A Chisel RTL generator for network-on-chip interconnects☆221Updated last week
- Lab exercises for Chisel in the digital electronics 2 course at DTU☆215Updated 5 months ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆143Updated this week
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆186Updated 6 months ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆86Updated 6 months ago
- An integrated CGRA design framework☆91Updated 8 months ago
- mflowgen -- A Modular ASIC/FPGA Flow Generator☆274Updated this week
- FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool☆97Updated 4 months ago
- Transactional Verilog design and Verilator Testbench for a RISC-V TensorCore Vector co-processor for reproducible linear algebra☆58Updated 3 years ago
- Collection of digital hardware modules & projects (benchmarks)☆69Updated last week
- A Standalone Structural Verilog Parser☆99Updated 3 years ago
- ☆44Updated last year
- GPU-based logic synthesis tool☆93Updated last week
- Pick your favorite language to verify your chip.☆73Updated last week
- high-performance RTL simulator☆182Updated last year
- The open-sourced version of BOOM-Explorer☆46Updated 2 years ago
- reference block design for the ASAP7nm library in Cadence Innovus☆51Updated last year
- Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".☆66Updated 5 months ago
- An open-source benchmark for generating design RTL with natural language☆142Updated last year
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Updated 2 years ago
- A dynamic verification library for Chisel.☆158Updated last year
- ☆89Updated 5 months ago
- Open source high performance IEEE-754 floating unit☆86Updated last year
- An infrastructure for integrated EDA☆42Updated 2 years ago