Alternatives and similar repositories for RePlAce

Users that are interested in RePlAce are comparing it to the libraries listed below

• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆137Updated 2 years ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆129Updated last year
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆177Updated 3 months ago
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆137Updated 2 years ago
• TILOS-AI-Institute / MacroPlacement
  Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source
  ☆281Updated 4 months ago
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆138Updated 2 months ago
• magical-eda / MAGICAL
  Machine Generated Analog IC Layout
  ☆252Updated last year
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆90Updated 4 years ago
• geziangfinn / easyPlace
  Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS
  ☆50Updated 10 months ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆75Updated 7 years ago
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆77Updated last year
• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆155Updated 4 months ago
• cuhk-eda / ripple
  Pin-Accessible Legalization for Mixed-Cell-Height Circuits
  ☆29Updated 3 years ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆42Updated last year
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆58Updated 5 years ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆105Updated last year
• cuhk-eda / cu-gr-2
  ☆46Updated last year
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• TimingPredict / Dataset
  Timing prediction dataset download and instructions.
  ☆15Updated 2 years ago
• ABKGroup / TritonRoute-WXL
  ☆33Updated 4 years ago
• lsils / benchmarks
  EPFL logic synthesis benchmarks
  ☆210Updated 2 months ago
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆56Updated 8 months ago
• ALIGN-analoglayout / ALIGN-public
  ☆315Updated 2 months ago
• ABKGroup / PlacementEssentialReadings
  ☆57Updated 4 years ago
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆39Updated 5 years ago
• NYU-MLDA / OpenABC
  OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…
  ☆130Updated last month
• NVlabs / AutoDMP
  ☆148Updated 2 years ago
• LQY404 / EDA-info
  the awesome work, project and lab of EDA (Electronic Design Automation). continue update...
  ☆24Updated last year
• magical-eda / UT-AnLay
  Analog Placement Quality Prediction
  ☆24Updated 2 years ago
• lnis-uofu / LSOracle
  IDEA project source files
  ☆108Updated last month