The-OpenROAD-Project / RePlAce
RePlAce global placement tool
☆226Updated 4 years ago
Alternatives and similar repositories for RePlAce:
Users that are interested in RePlAce are comparing it to the libraries listed below
- CUGR, VLSI Global Routing Tool Developed by CUHK☆128Updated 2 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆123Updated 7 months ago
- Xplace 2.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability Optimization☆116Updated 2 months ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆150Updated 2 months ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆132Updated last year
- Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source☆248Updated 4 months ago
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆28Updated 4 months ago
- 🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit☆138Updated 3 weeks ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆54Updated 4 years ago
- UCSD Detailed Router☆84Updated 4 years ago
- VLSI EDA Global Router☆71Updated 7 years ago
- ☆29Updated 4 years ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆124Updated 5 months ago
- IDEA project source files☆103Updated 4 months ago
- Artificial Netlist Generator☆36Updated 11 months ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆67Updated 6 months ago
- Machine Generated Analog IC Layout☆225Updated 10 months ago
- DATC RDF☆49Updated 4 years ago
- ☆286Updated this week
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆26Updated 3 years ago
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆90Updated 5 years ago
- Open Source Detailed Placement engine☆36Updated 5 years ago
- EPFL logic synthesis benchmarks☆180Updated 6 months ago
- ☆44Updated last year
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆99Updated last year
- ☆52Updated 4 years ago
- Database and Tool Framework for EDA☆111Updated 4 years ago
- Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)☆39Updated 6 years ago
- ☆10Updated 3 years ago
- OpenSTA engine☆441Updated 2 weeks ago