ieee-ceda-datc / RDF-2019
DATC RDF
☆49Updated 4 years ago
Alternatives and similar repositories for RDF-2019:
Users that are interested in RDF-2019 are comparing it to the libraries listed below
- DATC Robust Design Flow.☆37Updated 5 years ago
- Global Router Built for ICCAD Contest 2019☆30Updated 5 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆54Updated 4 years ago
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 2 years ago
- UCSD Detailed Router☆84Updated 4 years ago
- EDA physical synthesis optimization kit☆50Updated last year
- A LEF/DEF Utility.☆27Updated 5 years ago
- GPU-based logic synthesis tool☆81Updated 8 months ago
- VLSI EDA Global Router☆71Updated 7 years ago
- Collection of digital hardware modules & projects (benchmarks)☆48Updated 4 months ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆100Updated last year
- Open Source Detailed Placement engine☆36Updated 5 years ago
- OpenDesign Flow Database☆16Updated 6 years ago
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆20Updated 6 years ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆26Updated 3 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆123Updated 8 months ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆128Updated 2 years ago
- Steiner Shallow-Light Tree for VLSI Routing☆51Updated 8 months ago
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆90Updated 5 years ago
- ☆41Updated 11 months ago
- ☆13Updated 3 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆132Updated 2 years ago
- Intel's Analog Detailed Router☆38Updated 5 years ago
- ☆28Updated 3 years ago
- A parallel global router using the Galois framework☆27Updated last year
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆79Updated 2 months ago
- An analytical VLSI placer☆28Updated 3 years ago
- Incremental Timing-Driven Placement, problem C of ICCAD contest 2015☆13Updated 7 years ago
- Bounded-Skew DME v1.3☆14Updated 6 years ago
- ☆29Updated 4 years ago