OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
☆2,623Apr 29, 2026Updated this week
Alternatives and similar repositories for OpenROAD
Users that are interested in OpenROAD are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/☆617Updated this week
- OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology sc…☆1,769Mar 25, 2026Updated last month
- OpenSTA engine☆574Updated this week
- Deep learning toolkit-enabled VLSI placement☆979Updated this week
- Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.☆3,494Oct 28, 2024Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- RePlAce global placement tool☆251Aug 13, 2020Updated 5 years ago
- Yosys Open SYnthesis Suite☆4,416Updated this week
- An open-source static random access memory (SRAM) compiler.☆1,048Apr 17, 2026Updated last week
- A High-performance Timing Analysis Tool for VLSI Systems☆694Dec 26, 2025Updated 4 months ago
- Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source☆332Jan 5, 2026Updated 3 months ago
- Modular hardware build system☆1,154Updated this week
- Magic VLSI Layout Tool☆641Updated this week
- An open-source EDA infrastructure and tools from netlist to GDS☆501Mar 11, 2026Updated last month
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,222Updated this week
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆418Apr 22, 2026Updated last week
- Database and Tool Framework for EDA☆125Jan 25, 2021Updated 5 years ago
- UCSD Detailed Router☆98Jan 5, 2021Updated 5 years ago
- CUGR, VLSI Global Routing Tool Developed by CUHK☆145Feb 27, 2023Updated 3 years ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆160Jan 16, 2026Updated 3 months ago
- ABC: System for Sequential Logic Synthesis and Formal Verification☆1,160Updated this week
- Rsyn – An Extensible Physical Synthesis Framework☆139Jul 20, 2024Updated last year
- KLayout Main Sources☆1,086Apr 20, 2026Updated last week
- Fully Open Source FASOC generators built on top of open-source EDA tools☆327Oct 22, 2025Updated 6 months ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆196May 19, 2025Updated 11 months ago
- Qflow full end-to-end digital synthesis flow for ASIC designs☆229Oct 26, 2024Updated last year
- ☆355Updated this week
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆132Apr 4, 2026Updated 3 weeks ago
- An abstraction library for interfacing EDA tools☆762Updated this week
- OpenROAD users should look at this repository first for instructions on getting started☆102Apr 3, 2021Updated 5 years ago
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,226Apr 20, 2026Updated last week
- 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design. Documentation is here:☆717Updated this week
- Verilator open-source SystemVerilog simulator and lint system☆3,568Updated this week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- An Open-source FPGA IP Generator☆1,087Updated this week
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆343Dec 2, 2025Updated 4 months ago
- CircuitNet: An Open-Source Dataset for Machine Learning Applications in Electronic Design Automation (EDA)☆471Jul 17, 2025Updated 9 months ago
- ☆162Jul 12, 2023Updated 2 years ago
- Logic synthesis and ABC based optimization☆55Apr 9, 2026Updated 2 weeks ago
- ☆1,647Feb 11, 2026Updated 2 months ago
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compil…☆458Apr 5, 2026Updated 3 weeks ago