jinwookjungs / datc_robust_design_flow
DATC Robust Design Flow.
☆37Updated 5 years ago
Alternatives and similar repositories for datc_robust_design_flow:
Users that are interested in datc_robust_design_flow are comparing it to the libraries listed below
- DATC RDF☆49Updated 4 years ago
- Global Router Built for ICCAD Contest 2019☆30Updated 5 years ago
- EDA physical synthesis optimization kit☆52Updated last year
- Collection of digital hardware modules & projects (benchmarks)☆54Updated 5 months ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆54Updated 4 years ago
- A LEF/DEF Utility.☆28Updated 5 years ago
- ☆30Updated 3 years ago
- Material for OpenROAD Tutorial at DAC 2020☆47Updated 2 years ago
- UCSD Detailed Router☆84Updated 4 years ago
- ☆25Updated 2 years ago
- VLSI EDA Global Router☆72Updated 7 years ago
- OpenDesign Flow Database☆16Updated 6 years ago
- ☆71Updated 4 months ago
- ☆34Updated 5 years ago
- Open Source Detailed Placement engine☆37Updated 5 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆125Updated 8 months ago
- GPU-based logic synthesis tool☆81Updated 9 months ago
- Bounded-Skew DME v1.3☆14Updated 6 years ago
- A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.☆45Updated 3 months ago
- Circuit release of the MAGICAL project☆35Updated 5 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆79Updated 3 months ago
- Intel's Analog Detailed Router☆38Updated 5 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆26Updated 3 years ago
- ☆29Updated 4 years ago
- Delay Calculation ToolKit☆31Updated 2 years ago
- ☆14Updated 5 years ago
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆21Updated 6 years ago
- Steiner Shallow-Light Tree for VLSI Routing☆51Updated 9 months ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆101Updated last year