Alternatives and similar repositories for OpenPhySyn

Users that are interested in OpenPhySyn are comparing it to the libraries listed below

• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆47Updated 2 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• lnis-uofu / LSOracle
  IDEA project source files
  ☆108Updated last month
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆36Updated 5 years ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆90Updated 4 years ago
• IntelLabs / FloorSet
  ☆77Updated 3 months ago
• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆39Updated 5 years ago
• pkuzjx / eda-collection
  ☆105Updated 5 years ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆84Updated 4 months ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆61Updated this week
• AUCOHL / OGRE
  Global Router Built for ICCAD Contest 2019
  ☆33Updated 5 years ago
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆177Updated 3 months ago
• ABKGroup / PROBE3.0
  ☆45Updated last year
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆137Updated 2 years ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆75Updated 7 years ago
• The-OpenROAD-Project / asap5
  ☆34Updated 2 years ago
• geochrist / dctk
  Delay Calculation ToolKit
  ☆32Updated 3 years ago
• ieee-ceda-datc / datc-rdf-Metrics4ML
  ☆31Updated 3 years ago
• verilog-to-routing / tatum
  Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
  ☆62Updated last year
• OpenTimer / Parser-Verilog
  A Standalone Structural Verilog Parser
  ☆97Updated 3 years ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆129Updated last year
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆105Updated last year
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆32Updated 6 years ago
• The-OpenROAD-Project / OpenDB
  Database and Tool Framework for EDA
  ☆117Updated 4 years ago
• The-OpenROAD-Project / TritonCTS
  Source codes and calibration scripts for clock tree synthesis
  ☆40Updated 5 years ago
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆58Updated 5 years ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆90Updated last month
• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆155Updated 4 months ago
• aolofsson / POSH
  ☆44Updated 5 years ago