WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.
☆243Mar 4, 2026Updated last month
Alternatives and similar repositories for warp-v
Users that are interested in warp-v are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆27Feb 15, 2025Updated last year
- Framework for developing and deploying FPGA logic in the cloud as a microservice for web and cloud applications☆211Feb 24, 2026Updated last month
- Accompanying live info and links for VLSI Design Systems and Redwood EDA "Microprocessor for You in Thirty Hours" Workshop☆98Mar 6, 2025Updated last year
- Cornell CSL's Modular RISC-V RV64IM Out-of-Order Processor Built with PyMTL☆91Jul 29, 2019Updated 6 years ago
- Proposed RISC-V Composable Custom Extensions Specification☆70Jun 28, 2025Updated 9 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- An overview of TL-Verilog resources and projects☆86Feb 11, 2026Updated 2 months ago
- SERV - The SErial RISC-V CPU☆1,785Feb 19, 2026Updated last month
- Cross compile FPGA tools☆21Jan 4, 2021Updated 5 years ago
- RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…☆21Feb 25, 2023Updated 3 years ago
- VeeR EH1 core☆935May 29, 2023Updated 2 years ago
- RiscyOO: RISC-V Out-of-Order Processor☆171Jul 3, 2020Updated 5 years ago
- This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve…☆84Oct 28, 2023Updated 2 years ago
- The OpenPiton Platform☆782Feb 25, 2026Updated last month
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆50Jan 6, 2022Updated 4 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- RISC-V Formal Verification Framework☆629Apr 6, 2022Updated 4 years ago
- OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology sc…☆1,755Mar 25, 2026Updated 3 weeks ago
- A 32-bit RISC-V soft processor☆326Jan 26, 2026Updated 2 months ago
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆12Jan 14, 2026Updated 3 months ago
- Modular hardware build system☆1,143Updated this week
- RISC-V CPU Core☆420Jun 24, 2025Updated 9 months ago
- Featherweight RISC-V implementation☆53Jan 17, 2022Updated 4 years ago
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,886Apr 9, 2026Updated last week
- This repository contains the design and simulation process and results of potentiometric digital to analog converter.☆15Oct 6, 2020Updated 5 years ago
- Serverless GPU API endpoints on Runpod - Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- CDL Hardware implementations; BBC microcomputer, RISC-V (numerous), frame buffers, JTAG, etc☆17Feb 20, 2020Updated 6 years ago
- RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)☆336Jan 23, 2022Updated 4 years ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,406Feb 13, 2026Updated 2 months ago
- A 32-bit Microcontroller featuring a RISC-V core☆161Feb 28, 2018Updated 8 years ago
- RISC-V RV64GC emulator designed for RTL co-simulation☆237Nov 20, 2024Updated last year
- PicoRV☆43Feb 19, 2020Updated 6 years ago
- VRoom! RISC-V CPU☆518Sep 2, 2024Updated last year
- A list of resources related to the open-source FPGA projects☆449Nov 26, 2022Updated 3 years ago
- ☆20Dec 22, 2025Updated 3 months ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- OpenFPGA☆34Mar 12, 2018Updated 8 years ago
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆505Apr 10, 2026Updated last week
- Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.☆1,836Apr 10, 2026Updated last week
- SCR1 is a high-quality open-source RISC-V MCU core in Verilog☆976Nov 15, 2024Updated last year
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆150Mar 17, 2023Updated 3 years ago
- An Open-source FPGA IP Generator☆1,079Apr 11, 2026Updated last week
- nextpnr portable FPGA place and route tool☆1,650Updated this week