nextpnr portable FPGA place and route tool
☆1,627Mar 5, 2026Updated this week
Alternatives and similar repositories for nextpnr
Users that are interested in nextpnr are comparing it to the libraries listed below
Sorting:
- Yosys Open SYnthesis Suite☆4,316Updated this week
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,132Feb 26, 2026Updated last week
- Documenting the Lattice ECP5 bit-stream format.☆447Feb 26, 2026Updated last week
- Documenting the Xilinx 7-series bit-stream format.☆851Jun 5, 2025Updated 9 months ago
- Experimental flows using nextpnr for Xilinx devices☆254Oct 11, 2024Updated last year
- Universal utility for programming FPGA☆1,562Updated this week
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,210Updated this week
- Place and route tool for FPGAs☆424Jul 28, 2019Updated 6 years ago
- Build your hardware, easily!☆3,747Updated this week
- Project Apicula 🐝: bitstream documentation for Gowin FPGAs☆644Updated this week
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆496Updated this week
- A modern hardware definition language and toolchain based on Python☆1,914Feb 28, 2026Updated last week
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,986Jun 27, 2024Updated last year
- Visual editor for open FPGA boards☆1,878Feb 16, 2026Updated 3 weeks ago
- Open source ecosystem for open FPGA boards☆956Updated this week
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆683Jan 8, 2022Updated 4 years ago
- SERV - The SErial RISC-V CPU☆1,761Feb 19, 2026Updated 2 weeks ago
- Documenting Lattice's 28nm FPGA parts☆149Feb 26, 2026Updated last week
- VHDL synthesis (based on ghdl)☆356Jan 11, 2026Updated last month
- Multi-platform nightly builds of open source digital design and verification tools☆1,369Updated this week
- Package manager and build abstraction tool for FPGA/ASIC development☆1,391Feb 13, 2026Updated 3 weeks ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,032Feb 11, 2026Updated 3 weeks ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆303Updated this week
- An abstraction library for interfacing EDA tools☆756Feb 18, 2026Updated 2 weeks ago
- Verilator open-source SystemVerilog simulator and lint system☆3,391Updated this week
- A Python toolbox for building complex digital hardware☆1,322Jan 5, 2026Updated 2 months ago
- FOSS Flow For FPGA☆425Jan 6, 2025Updated last year
- An Open-source FPGA IP Generator☆1,057Updated this week
- Small and low cost FPGA educational and development board☆667Feb 10, 2025Updated last year
- PCB for ULX3S FPGA R&D board☆423Apr 27, 2025Updated 10 months ago
- Linux on LiteX-VexRiscv☆689Feb 16, 2026Updated 3 weeks ago
- Icarus Verilog☆3,352Updated this week
- draws an SVG schematic from a JSON netlist☆770Jan 25, 2024Updated 2 years ago
- Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pi…☆1,398Jan 5, 2026Updated 2 months ago
- Build Customized FPGA Implementations for Vivado☆355Mar 2, 2026Updated last week
- Multi-platform nightly builds of open source FPGA tools☆301Nov 3, 2021Updated 4 years ago
- Small footprint and configurable DRAM core☆475Feb 19, 2026Updated 2 weeks ago
- Learning FPGA, yosys, nextpnr, and RISC-V☆3,416Nov 18, 2025Updated 3 months ago
- Example designs showing different ways to use F4PGA toolchains.☆286Mar 27, 2024Updated last year