An Open-source FPGA IP Generator
☆1,094May 2, 2026Updated this week
Alternatives and similar repositories for OpenFPGA
Users that are interested in OpenFPGA are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆151Mar 17, 2023Updated 3 years ago
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,222Updated this week
- OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology sc…☆1,769Mar 25, 2026Updated last month
- An easy-to-use, silicon-proven (e)FPGA generator with an integrated CAD toolchain 🏗️☆252Updated this week
- An abstraction library for interfacing EDA tools☆762Apr 24, 2026Updated last week
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Open-source FPGA research and prototyping framework.☆211Aug 8, 2024Updated last year
- A list of resources related to the open-source FPGA projects☆451Nov 26, 2022Updated 3 years ago
- Yosys Open SYnthesis Suite☆4,423Updated this week
- An open-source static random access memory (SRAM) compiler.☆1,048Apr 17, 2026Updated 2 weeks ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,410Feb 13, 2026Updated 2 months ago
- Universal utility for programming FPGA☆1,615Apr 26, 2026Updated last week
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compil…☆458Apr 5, 2026Updated 3 weeks ago
- Modular hardware build system☆1,154Updated this week
- SERV - The SErial RISC-V CPU☆1,791Feb 19, 2026Updated 2 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- nextpnr portable FPGA place and route tool☆1,658Updated this week
- Build your hardware, easily!☆3,851Updated this week
- Build Customized FPGA Implementations for Vivado☆370Apr 25, 2026Updated last week
- SystemVerilog to Verilog conversion☆725Mar 28, 2026Updated last month
- IDEA project source files☆112Apr 15, 2026Updated 2 weeks ago
- Framework Open EDA Gui☆74Dec 11, 2024Updated last year
- Common SystemVerilog components☆738Updated this week
- FOSS Flow For FPGA☆435Jan 6, 2025Updated last year
- Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.☆3,501Oct 28, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Verilog library for ASIC and FPGA designers☆1,410May 8, 2024Updated last year
- Documenting the Xilinx 7-series bit-stream format.☆875Jun 5, 2025Updated 10 months ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆306Updated this week
- cocotb: Python-based chip (RTL) verification☆2,354Updated this week
- AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication☆1,561Apr 22, 2026Updated last week
- OpenSTA engine☆574Apr 23, 2026Updated last week
- OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/☆2,623Updated this week
- Verilog Ethernet components for FPGA implementation☆2,947Feb 27, 2025Updated last year
- Plugins for Yosys developed as part of the F4PGA project.☆84May 14, 2024Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more☆2,234Updated this week
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,133Feb 11, 2026Updated 2 months ago
- Verilator open-source SystemVerilog simulator and lint system☆3,568Updated this week
- BaseJump STL: A Standard Template Library for SystemVerilog☆660Apr 7, 2026Updated 3 weeks ago
- A Linux-capable RISC-V multicore for and by the world☆798Apr 24, 2026Updated last week
- Verilog PCI express components☆1,591Apr 26, 2024Updated 2 years ago
- Learning FPGA, yosys, nextpnr, and RISC-V☆3,486Nov 18, 2025Updated 5 months ago