os-fpga / open-source-fpga-resourceLinks
A list of resources related to the open-source FPGA projects
☆433Updated 3 years ago
Alternatives and similar repositories for open-source-fpga-resource
Users that are interested in open-source-fpga-resource are comparing it to the libraries listed below
Sorting:
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆298Updated last week
- Example designs showing different ways to use F4PGA toolchains.☆281Updated last year
- ☆366Updated 2 years ago
- FOSS Flow For FPGA☆415Updated 11 months ago
- Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.☆369Updated 9 months ago
- A huge VHDL library for FPGA and digital ASIC development☆416Updated last week
- UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …☆419Updated 3 weeks ago
- Linux on LiteX-VexRiscv☆672Updated 2 weeks ago
- CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…☆454Updated this week
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆692Updated 2 weeks ago
- A self-contained online book containing a library of FPGA design modules and related coding/design guides.☆457Updated last year
- CORE-V Family of RISC-V Cores☆310Updated 10 months ago
- VHDL synthesis (based on ghdl)☆353Updated last month
- Project F brings FPGAs to life with exciting open-source designs you can build on.☆737Updated 11 months ago
- FuseSoC-based SoC for VeeR EH1 and EL2☆335Updated last year
- A simple RISC-V processor for use in FPGA designs.☆283Updated last year
- https://caravel-user-project.readthedocs.io☆224Updated 9 months ago
- Small footprint and configurable DRAM core☆460Updated 3 weeks ago
- LiteX boards files☆449Updated last week
- An Open-source FPGA IP Generator☆1,026Updated last week
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆481Updated last week
- All code found on nandland is here. underconstruction.gif☆352Updated 3 years ago
- An abstraction library for interfacing EDA tools☆731Updated this week
- PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).☆450Updated 2 years ago
- The PoC Library has been forked to github.com/VHDL/PoC. See new address below☆599Updated 4 months ago
- This repo is a fork of the master OpenLANE repo for us with projects submitted on Efabless Open MPW or chipIgnite shuttles:: OpenLANE is …☆160Updated last year
- SystemVerilog to Verilog conversion☆686Updated last month
- Multi-platform nightly builds of open source FPGA tools☆299Updated 4 years ago
- Bus bridges and other odds and ends☆612Updated 8 months ago
- A List of Free and Open Source Hardware Verification Tools and Frameworks☆576Updated 2 years ago