xzlashutosh / avsddac_3v3Links
This repository contains the design and simulation process and results of potentiometric digital to analog converter.
☆15Updated 4 years ago
Alternatives and similar repositories for avsddac_3v3
Users that are interested in avsddac_3v3 are comparing it to the libraries listed below
Sorting:
- Completed LDO Design for Skywaters 130nm☆14Updated 2 years ago
- Open Analog Design Environment☆24Updated 2 years ago
- A current mode buck converter on the SKY130 PDK☆27Updated 4 years ago
- submission repository for efabless mpw6 shuttle☆30Updated last year
- Ubuntu scripts that are used for setting up your machine for Sky130 designs.☆18Updated 4 years ago
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆12Updated 4 years ago
- Analog and power building blocks for sky130 pdk☆20Updated 4 years ago
- ☆41Updated 3 years ago
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆17Updated last year
- ☆37Updated 3 years ago
- Guides and templates for using open source RF design tools with the SkyWater SKY130 process.☆19Updated 4 years ago
- 12-bit 10-KSPS Incremental Delta-Sigma ADC in Skywater 130 nm☆19Updated 2 years ago
- Quick'n'dirty FuseSoC+cocotb example☆18Updated 7 months ago
- A CIC filter implemented in Verilog☆22Updated 9 years ago
- A 32 bit RISCV Based SOC with QSpi , Uart and 8 bit SDRAM Controller tagetted to efebless shuttle program☆21Updated 2 years ago
- ☆36Updated 8 months ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆42Updated 4 months ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- An SRAM IP Uniquely designed with open source tools. Static RAM is a type of random-access memory that uses latching circuitry (flip-flop…☆11Updated 4 years ago
- ☆12Updated 3 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆23Updated 4 years ago
- Design of 4KB Static RAM 1.8V (access time <2.5ns) using OpenRAM and Sky130 node☆14Updated 4 years ago
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Updated 2 years ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆27Updated 2 years ago
- Demosaic (Bilinear)☆9Updated 11 years ago
- This repository contains simulation files and other relevant files on the On-chip clock multiplier (PLL) (Fclkin—5MHz to 12MHz, Fclkout—4…☆15Updated 3 years ago
- components and examples for creating radio ICs using the open skywater 130nm PDK☆19Updated 4 years ago
- Skywater 130nm Klayout Device Generators PDK☆31Updated last year
- A Spice simulation interface☆9Updated 3 years ago
- https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/☆28Updated 5 months ago