This repository contains the design and simulation process and results of potentiometric digital to analog converter.
☆16Oct 6, 2020Updated 5 years ago
Alternatives and similar repositories for avsddac_3v3
Users that are interested in avsddac_3v3 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This repository will maintain simulation files, layout files and other relevant files on the SAR ADC worked on in the VSD Summer Online I…☆21Dec 15, 2020Updated 5 years ago
- Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM☆19Sep 8, 2020Updated 5 years ago
- Open Analog Design Environment☆26May 19, 2023Updated 3 years ago
- Zero to ASIC group submission for MPW2☆13Mar 26, 2025Updated last year
- A current mode buck converter on the SKY130 PDK☆36Jun 17, 2021Updated 4 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Collection of IPs based on AMBA (AHB, APB, AXI) protocols☆19Feb 1, 2017Updated 9 years ago
- Completed LDO Design for Skywaters 130nm☆19Feb 16, 2023Updated 3 years ago
- SRAM☆24Sep 6, 2020Updated 5 years ago
- The official Python library for the Log-hub API☆18Oct 27, 2025Updated 7 months ago
- the xoroshiro32++ and xoroshiro64++ PRNG algorthims by David Blackman and Sebastiano Vigna in C++, Verilog, VHDL and SpinalHDL.☆16Dec 2, 2018Updated 7 years ago
- Theia: ray graphic processing unit☆20Jul 17, 2014Updated 11 years ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆31Jul 30, 2022Updated 3 years ago
- babel plugin which use jsdoc to implement strong typing in javascript☆11May 3, 2016Updated 10 years ago
- Python-based domain-specific language for computational magnetism.☆13May 18, 2026Updated last week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Open-source implementations of reference Physical True Random Number Generators (TRNG or PTRNG) based on ring oscillators.☆17Mar 26, 2026Updated 2 months ago
- Builds, flow and designs for the alpha release☆54Dec 18, 2019Updated 6 years ago
- An adapter board with pin headers for low-pin count (LPC) FPGA Mezzanine Cards (FMC).☆11Nov 2, 2020Updated 5 years ago
- Small micro-coded RISC-V softcore☆15Nov 27, 2018Updated 7 years ago
- Document about design of a GNSS receiver☆14May 28, 2020Updated 6 years ago
- A dual-socket USB host PMOD module.☆15Mar 20, 2025Updated last year
- WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.☆245Mar 4, 2026Updated 2 months ago
- An interpreter for Janus, the reversible programming language.☆15Jun 7, 2020Updated 5 years ago
- ☆13Nov 28, 2023Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A div-less, mul-less, atomic-less `rv64i` compiler toolchain using purely clang, musl, and compiler-rt☆30Feb 21, 2020Updated 6 years ago
- ☆15Sep 19, 2019Updated 6 years ago
- Simulated Annealing for MAX-CUT problems on {+1,-1}-weighted complete graphs☆13Feb 2, 2019Updated 7 years ago
- components and examples for creating radio ICs using the open skywater 130nm PDK☆19Nov 29, 2020Updated 5 years ago
- Some crazy experiments about using a FPGA to transmit a TV signal old-style☆13Oct 13, 2018Updated 7 years ago
- 2D Ising model in C++, including IPython notebook examples☆12Nov 14, 2019Updated 6 years ago
- LiteX LUNA USB stack integration☆14Jun 12, 2022Updated 3 years ago
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆74Oct 4, 2021Updated 4 years ago
- This is a Multi master Multi slave compatible system bus design modeled using verilog. This is much like AMBA AHB Specification☆31Jan 6, 2020Updated 6 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Skywater 130nm Klayout Device Generators PDK☆30Jul 12, 2024Updated last year
- org-babel functions for rust evaluation☆12Jun 12, 2015Updated 10 years ago
- USB1.1 Host Controller + PHY☆15Aug 4, 2021Updated 4 years ago
- An experiment at expressing functors in F# the .NET type system.☆17Dec 8, 2013Updated 12 years ago
- Atom Hardware IDE☆13May 4, 2021Updated 5 years ago
- BananaBread demo☆12Mar 11, 2016Updated 10 years ago
- Embedded UVM (D Language port of IEEE UVM 1.0)☆34Nov 6, 2025Updated 6 months ago