Alternatives and similar repositories for INSTA

Users that are interested in INSTA are comparing it to the libraries listed below

• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆69Updated last week
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆58Updated 5 months ago
• IntelLabs / FloorSet
  ☆76Updated 5 months ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆93Updated this week
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆86Updated 6 months ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆107Updated last year
• tsung-wei-huang / ece5960-physical-design
  ☆40Updated 2 years ago
• ABKGroup / TritonPart
  The first version of TritonPart
  ☆29Updated last year
• lamda-bbo / Open3DBench
  Official implementation of paper "Open3DBench: Open-Source Benchmark for 3D-IC Backend Implementation and PPA Evaluation".
  ☆66Updated 5 months ago
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆58Updated 10 months ago
• ABKGroup / PROBE3.0
  ☆49Updated last year
• ASU-VDA-Lab / ASP-DAC24-Tutorial
  This GitHub repo is for the OpenROAD and CircuitOps Tutorial at ASP-DAC 2024
  ☆52Updated 10 months ago
• Yu-Maryland / Verilog-to-PyG
  ☆27Updated last year
• Ravenslofty / librecell
  ☆26Updated 4 years ago
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆23Updated last year
• PKU-IDEA / OpenPARF
  🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit
  ☆160Updated 6 months ago
• ieee-ceda-datc / datc-rdf-Metrics4ML
  ☆31Updated 3 years ago
• zshi0616 / python-deepgate
  ☆25Updated last year
• The-OpenROAD-Project / asap7
  ☆208Updated 8 months ago
• Centre-for-Hardware-Security / asap7_reference_design
  reference block design for the ASAP7nm library in Cadence Innovus
  ☆51Updated last year
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆46Updated 2 years ago
• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆55Updated 5 months ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• pkuzjx / eda-collection
  ☆107Updated 5 years ago
• TILOS-AI-Institute / MLCAD-2023-FPGA-Macro-Placement-Contest
  ☆31Updated 2 years ago
• CODA-Team / AnalogGym
  ☆62Updated 2 weeks ago
• HKUSTGZ-MICS-LYU / FlattenRTL
  This is a python repo for flattening Verilog
  ☆20Updated 6 months ago
• NVlabs / CircuitOps
  ☆92Updated 4 months ago
• The-OpenROAD-Project / asap5
  ☆35Updated 2 years ago
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆44Updated last year