Alternatives and similar repositories for cirbo

Users that are interested in cirbo are comparing it to the libraries listed below

• amahzoon / genmul
  ☆17Updated 4 years ago
• Gy-Hu / E-Syn
  E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)
  ☆35Updated last year
• Yu-Maryland / MapTune
  MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…
  ☆21Updated 4 months ago
• alanminko / iwls2022-ls-contest
  Problems and Results of IWLS 2022 Programming Contest
  ☆18Updated 4 months ago
• hkustgz-zhang-lab / ABCPaperCheck
  Research paper based on or related to ABC.
  ☆51Updated last month
• fangwenji / tacas23-wasim
  ☆12Updated 2 years ago
• SJTU-ECTL / ALSRAC
  ALSRAC: Approximate Logic Synthesis by Resubstitution with Approximate Care Set
  ☆19Updated 8 months ago
• Yu-Maryland / Gamora
  Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)
  ☆49Updated 7 months ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆90Updated 2 weeks ago
• cure-lab / DeepGate
  This is an official implementation for "DeepGate: Learning Neural Representations of Logic Gates".
  ☆23Updated 2 years ago
• Chenghao-Yang / awesome-ml4ls
  Awesome machine learning for logic synthesis
  ☆29Updated 2 years ago
• nbulsi / also
  A logic synthesis tool
  ☆78Updated last month
• zslwyuan / AutoCellLibX
  AutoCellLibX: Automated Standard Cell Library Extension Based on Pattern Mining
  ☆15Updated 2 years ago
• zshi0616 / python-deepgate
  ☆22Updated last year
• HybridCEC / Hybrid-CEC
  A high-efficiency hybrid solving CEC algorithm
  ☆13Updated 2 years ago
• Yu-Maryland / Verilog-to-PyG
  ☆24Updated last year
• panhomyoung / phyLS
  A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…
  ☆32Updated last month
• ckchengucsd / SMTCellUCSD
  Cell Layout Generation for DTCO/STCO Exploration Toolkit
  ☆16Updated 3 months ago
• arminbiere / aiger
  AIGER And-Inverter-Graph Library
  ☆86Updated 3 weeks ago
• zshi0616 / DeepGate2
  ☆28Updated last year
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆59Updated last month
• SJTU-ECTL / GOMIL
  GOMIL: Global Optimization of Multiplier by Integer Linear Programming
  ☆13Updated 4 years ago
• d-kfmnn / amulet2
  AMulet 2. - A better AIG Multiplier Examination Tool
  ☆25Updated 2 years ago
• OSCC-Project / iMap
  Logic optimization and technology mapping tool.
  ☆19Updated last year
• yaoxufeng / RTLRewriter-Bench
  ☆36Updated last year
• Entropy-xcy / sns
  ☆19Updated 2 years ago
• Gy-Hu / HWMCC24-benchmark
  Collection for submission (Hardware Model Checking Benchmark)
  ☆10Updated 10 months ago
• lsils / lstools-showcase
  Showcase examples for EPFL logic synthesis libraries
  ☆195Updated last year
• iwls2020-lsml-contest / iwls2020-lsml-contest
  ☆21Updated 2 years ago
• hkust-zhiyao / AssertLLM
  Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs
  ☆38Updated 9 months ago