hanchenye / polyaieLinks
An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE
☆17Updated 3 years ago
Alternatives and similar repositories for polyaie
Users that are interested in polyaie are comparing it to the libraries listed below
Sorting:
- Xilinx Modifications to Halide☆14Updated 4 years ago
- Multi-target compiler for Sum-Product Networks, based on MLIR and LLVM.☆25Updated last year
- Polyhedral High-Level Synthesis in MLIR☆35Updated 2 years ago
- Domain-Specific Architecture Generator 2☆21Updated 3 years ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆53Updated 2 years ago
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Updated 2 years ago
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Updated last year
- HeteroCL-MLIR dialect for accelerator design☆42Updated last year
- A hardware synthesis framework with multi-level paradigm☆43Updated last year
- ☆60Updated 2 years ago
- EQueue Dialect☆41Updated 3 years ago
- agile hardware-software co-design☆52Updated 4 years ago
- ☆24Updated 5 years ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Updated 2 years ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆64Updated last year
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Updated 5 years ago
- A polyhedral compiler for hardware accelerators☆59Updated last year
- ☆62Updated this week
- ☆52Updated 11 months ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆62Updated 3 years ago
- ☆24Updated this week
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- ☆32Updated last year
- ☆41Updated 9 months ago
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆43Updated 6 months ago
- ☆36Updated 4 years ago
- Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"☆32Updated last year
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆34Updated 11 months ago
- A fast, accurate trace-based simulator for High-Level Synthesis.☆73Updated 3 weeks ago
- ☆25Updated last year