An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE
☆17Aug 5, 2022Updated 3 years ago
Alternatives and similar repositories for polyaie
Users that are interested in polyaie are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Xilinx Modifications to Halide☆13May 3, 2021Updated 4 years ago
- ☆25Jan 7, 2026Updated 3 months ago
- MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)☆22Apr 17, 2024Updated 2 years ago
- Symbolic range analysis for LLVM.☆12Jan 10, 2016Updated 10 years ago
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 4 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- A novel spatial accelerator for horizontal diffusion weather stencil computation, as described in ICS 2023 paper by Singh et al. (https:/…☆22Jul 27, 2023Updated 2 years ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆36Jan 16, 2025Updated last year
- ☆13Dec 7, 2023Updated 2 years ago
- Accelerating SSSP for power-law graphs using an FPGA.☆23Mar 29, 2022Updated 4 years ago
- Generate versal system design from ONNX model. AI engine kernels. Sub-microsecond speeds for autoencoders.☆17Dec 29, 2024Updated last year
- ☆24Nov 10, 2020Updated 5 years ago
- Domain-Specific Architecture Generator 2☆23Oct 2, 2022Updated 3 years ago
- Generator for MLIR files from known front-ends☆16Oct 31, 2023Updated 2 years ago
- ICCAD'23 Best Paper Award candidate: Robust GNN-based Representation Learning for HLS☆24May 23, 2024Updated last year
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- 📥 🎯 (1,4/4) an MLIR-based toolchain with Vitis HLS LLVM input/output targeting FPGAs.☆15Nov 15, 2022Updated 3 years ago
- DASS HLS Compiler☆31Oct 4, 2023Updated 2 years ago
- view at https://xupsh.github.io/ccc2021/☆23Apr 16, 2022Updated 4 years ago
- Implementation of Eulerian-on-Lagrangian Cloth Simulation on Siggraph 2018☆13Jul 23, 2019Updated 6 years ago
- HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration☆15Sep 14, 2020Updated 5 years ago
- ☆17Apr 10, 2026Updated last week
- An alternative Vivado custom design example (to fully Vitis) for the User Logic Partition targeting VCK5000☆13Jul 16, 2024Updated last year
- ☆62Mar 24, 2025Updated last year
- FPGA 2025 SAT Accel: A modern SAT Solver on FPGA Repository☆14Mar 13, 2025Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerat…☆19Aug 26, 2024Updated last year
- ☆132Updated this week
- Fork of LLVM to support AMD AIEngine processors☆193Updated this week
- A Java framework focused on rapid prototyping of new CAD algorithms for FPGA compilation.☆14Aug 5, 2024Updated last year
- A multi-threaded microprocessor interleaving as minimum two threads, which is pin-to-pin compatible with pulpino riscy cores☆24Aug 24, 2024Updated last year
- NetCracker is an FPGA architecture analysis tool for facilitating the investigation of connectivity patterns within as well as in between…☆17Dec 4, 2020Updated 5 years ago
- A hardware synthesis framework with multi-level paradigm☆44Jan 10, 2025Updated last year
- Development and simulation framework for Application Specific Vector Processor☆16Mar 8, 2020Updated 6 years ago
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆22Oct 31, 2024Updated last year
- Deploy open-source AI quickly and easily - Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- ☆18Feb 3, 2022Updated 4 years ago
- DRA+RISC-V Exploration Framework☆19Jan 8, 2024Updated 2 years ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆55Jul 17, 2023Updated 2 years ago
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆103Jun 30, 2025Updated 9 months ago
- Systolic array implementations for Cholesky, LU, and QR decomposition☆50Nov 12, 2024Updated last year
- An efficient concurrent graph processing system☆46Oct 27, 2021Updated 4 years ago
- ☆62Aug 4, 2023Updated 2 years ago