Alternatives and similar repositories for usizer:

Users that are interested in usizer are comparing it to the libraries listed below

• krzhu / abcRL
  MLCAD 2020: Reinforcement for logic optimization sequence exploration
  ☆28Updated 4 years ago
• lrakai / gate-sizing
  Optimal gate sizing of digital circuits using geometric programming
  ☆10Updated 8 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆49Updated 4 years ago
• AUCOHL / OGRE
  Global Router Built for ICCAD Contest 2019
  ☆30Updated 4 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆37Updated 5 years ago
• krzhu / abc_py
  Simple Python interface for ABC
  ☆24Updated last year
• cuhk-eda / ripple
  Pin-Accessible Legalization for Mixed-Cell-Height Circuits
  ☆26Updated 2 years ago
• PKU-IDEA / MacroRank
  Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)
  ☆16Updated last year
• cuhk-eda / Xplace
  Xplace 2.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability Optimization
  ☆113Updated 2 months ago
• ABKGroup / TritonRoute-WXL
  ☆26Updated 4 years ago
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆66Updated 5 months ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆123Updated 7 months ago
• magical-eda / UT-AnLay
  Analog Placement Quality Prediction
  ☆20Updated last year
• ABKGroup / PlacementEssentialReadings
  ☆52Updated 3 years ago
• UTDA-group / BoxRouter
  BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…
  ☆20Updated 6 years ago
• TimingPredict / Dataset
  Timing prediction dataset download and instructions.
  ☆13Updated last year
• ieee-ceda-datc / datc-rdf-Metrics4ML
  ☆28Updated 3 years ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆128Updated last year
• daeyeon22 / artificial_netlist_generator
  Artificial Netlist Generator
  ☆35Updated 11 months ago
• TILOS-AI-Institute / MLCAD-2023-FPGA-Macro-Placement-Contest
  ☆29Updated last year
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆80Updated 7 months ago
• UMN-EDA / BeGAN-benchmarks
  ☆24Updated last year
• ABKGroup / PROBE_SMT_AutoCell
  ☆17Updated last year
• LQY404 / EDA-info
  the awesome work, project and lab of EDA (Electronic Design Automation). continue update...
  ☆21Updated 5 months ago
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆53Updated 4 years ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆71Updated 7 years ago
• geziangfinn / easyPlace
  Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS
  ☆27Updated 3 months ago
• cuhk-eda / REST
  REST, a reinforcement learning framework for constructing rectilinear Steiner Minimum tree (RSMT)
  ☆54Updated 2 years ago
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆132Updated last year
• EricLu1218 / Physical_Design_Automation
  2019 NTHU CS6135 (CS613500) VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing …
  ☆28Updated last year