Alternatives and similar repositories for usizer

Users that are interested in usizer are comparing it to the libraries listed below

• krzhu / abcRL
  MLCAD 2020: Reinforcement for logic optimization sequence exploration
  ☆28Updated 4 years ago
• TimingPredict / TimingPredict
  Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)
  ☆77Updated last year
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆139Updated 2 years ago
• krzhu / abc_py
  Simple Python interface for ABC
  ☆23Updated 2 years ago
• cuhk-eda / dr-cu
  Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
  ☆137Updated 2 years ago
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆139Updated 3 months ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆132Updated last year
• ABKGroup / TritonRoute-WXL
  ☆34Updated 4 years ago
• ABKGroup / PlacementEssentialReadings
  ☆58Updated 4 years ago
• scale-lab / DRiLLS
  DRiLLS: Deep Reinforcement Learning for Logic Synthesis Optimization (ASPDAC'20)
  ☆114Updated 2 years ago
• TILOS-AI-Institute / MLCAD-2023-FPGA-Macro-Placement-Contest
  ☆31Updated 2 years ago
• The-OpenROAD-Project / RePlAce
  RePlAce global placement tool
  ☆239Updated 5 years ago
• cuhk-eda / ripple
  Pin-Accessible Legalization for Mixed-Cell-Height Circuits
  ☆30Updated 3 years ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆91Updated 4 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆75Updated 7 years ago
• cuhk-eda / REST
  REST, a reinforcement learning framework for constructing rectilinear Steiner Minimum tree (RSMT)
  ☆57Updated 3 years ago
• laiyao1 / MaskPlace
  ☆66Updated 2 years ago
• MIRALab-USTC / AI4EDA-EfficientPlace
  This is the code for our paper "Reinforcement Learning within Tree Search for Fast Macro Placement".
  ☆33Updated 11 months ago
• NYU-MLDA / OpenABC
  OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…
  ☆133Updated 2 months ago
• lrakai / gate-sizing
  Optimal gate sizing of digital circuits using geometric programming
  ☆11Updated 9 years ago
• magical-eda / UT-AnLay
  Analog Placement Quality Prediction
  ☆24Updated 2 years ago
• PKU-IDEA / MacroRank
  Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)
  ☆17Updated 2 years ago
• TimingPredict / Dataset
  Timing prediction dataset download and instructions.
  ☆15Updated 2 years ago
• laiyao1 / ChiPFormer
  The release for ICML 2023 paper
  ☆47Updated last year
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆90Updated 2 months ago
• cuhk-eda / cu-gr-2
  ☆47Updated last year
• AUCOHL / OGRE
  Global Router Built for ICCAD Contest 2019
  ☆33Updated 5 years ago
• lsils / benchmarks
  EPFL logic synthesis benchmarks
  ☆213Updated last week
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆62Updated last month