Alternatives and similar repositories for stellar:

Users that are interested in stellar are comparing it to the libraries listed below

• UIUC-ChenLab / ScaleHLS-HIDA
  ☆41Updated 10 months ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 2 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆46Updated this week
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆67Updated 3 years ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆44Updated last month
• UIUC-ChenLab / Nimblock
  ☆11Updated last year
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆58Updated last week
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆77Updated last year
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆66Updated 5 years ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆38Updated last week
• he-actlab / planaria.code
  ☆25Updated 3 years ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆55Updated 3 months ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆57Updated 6 months ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆41Updated 2 years ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆43Updated 3 months ago
• Yinxiao-Feng / chiplet-network-sim
  ☆19Updated last month
• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆18Updated 8 months ago
• sharc-lab / LightningSim
  A fast, accurate trace-based simulator for High-Level Synthesis.
  ☆39Updated 8 months ago
• pnnl / soda-opt
  ☆37Updated 6 months ago
• diwu1990 / UnarySim
  This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…
  ☆42Updated last year
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆29Updated 3 years ago
• Accelergy-Project / processing-in-memory-design
  ☆25Updated 8 months ago
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆39Updated 2 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆84Updated 3 months ago
• adam-smnk / Open-CIM-Compiler
  ☆28Updated 3 years ago
• UCLA-VAST / Serpens
  Serpens is an HBM FPGA accelerator for SpMV
  ☆17Updated 5 months ago
• SET-Scheduling-Project / SET-ISCA2023
  The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
  ☆58Updated this week
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆13Updated 2 years ago
• ConvolutedDog / HyFiSS
  HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs
  ☆21Updated last month