lydiawunan / HLS-Perf-Prediction-with-GNNs
High-Level Synthesis Performance Prediction using GNNs: Benchmarking, Modeling, and Advancing
☆47Updated 7 months ago
Alternatives and similar repositories for HLS-Perf-Prediction-with-GNNs:
Users that are interested in HLS-Perf-Prediction-with-GNNs are comparing it to the libraries listed below
- Dataset for ML-guided Accelerator Design☆33Updated 2 months ago
- MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design☆39Updated 4 months ago
- DATE'24 paper: "Hierarchical Source-to-Post-Route QoR Prediction in High-Level Synthesis with GNNs"☆13Updated last month
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)☆48Updated last week
- [ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)☆41Updated 3 years ago
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆68Updated 2 years ago
- [DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs☆17Updated 2 years ago
- QuickEst repository: Quick Estimation of Quality of Results☆26Updated 6 years ago
- Template-based Reconfigurable Architecture Modeling Framework☆13Updated 2 years ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆40Updated last year
- The open-sourced version of BOOM-Explorer☆36Updated last year
- An end-to-end GCN inference accelerator written in HLS☆19Updated 2 years ago
- ☆16Updated 2 years ago
- ☆40Updated 10 months ago
- An Open-Source Tool for CGRA Accelerators☆18Updated 8 months ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆14Updated last year
- Hop-Wise Graph Attention for Scalable and Generalizable Learning on Circuits☆26Updated 4 months ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆67Updated 3 years ago
- A list of our chiplet simulaters☆26Updated 3 years ago
- An integrated CGRA design framework☆85Updated 2 months ago
- ☆16Updated last year
- An Automated Framework for Generic Graph Neural Network Accelerator Generation, Simulation, and Optimization☆19Updated 2 months ago
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆23Updated last year
- ☆22Updated 8 months ago
- ☆37Updated 6 months ago
- ☆29Updated last year
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆23Updated last month
- A circuit-element level explainer to explain machine learning model's prediction on chip layouts.☆17Updated last year
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆75Updated 5 months ago
- ☆37Updated 6 months ago