sylefeb / SiliceLinks
Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pipelines.
☆1,380Updated 3 weeks ago
Alternatives and similar repositories for Silice
Users that are interested in Silice are comparing it to the libraries listed below
Sorting:
- A modern hardware definition language and toolchain based on Python☆1,822Updated last week
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆679Updated last week
- SERV - The SErial RISC-V CPU☆1,659Updated last week
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆679Updated 3 years ago
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,111Updated last week
- nextpnr portable FPGA place and route tool☆1,532Updated this week
- 🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…☆1,882Updated this week
- Modular hardware build system☆1,093Updated last week
- Build your hardware, easily!☆3,560Updated last week
- Learning FPGA, yosys, nextpnr, and RISC-V☆2,995Updated 8 months ago
- Visual editor for open FPGA boards☆1,830Updated 2 months ago
- VRoom! RISC-V CPU☆511Updated last year
- A small, light weight, RISC CPU soft core☆1,468Updated 2 months ago
- A Python toolbox for building complex digital hardware☆1,308Updated 3 weeks ago
- Send video/audio over HDMI on an FPGA☆1,205Updated last year
- Open source ecosystem for open FPGA boards☆901Updated this week
- Universal utility for programming FPGA☆1,450Updated 3 weeks ago
- Bluespec Compiler (BSC)☆1,054Updated 3 weeks ago
- A tiny Open POWER ISA softcore written in VHDL 2008☆699Updated 2 weeks ago
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,897Updated this week
- Documenting the Xilinx 7-series bit-stream format.☆830Updated 4 months ago
- Multi-platform nightly builds of open source digital design and verification tools☆1,204Updated this week
- Package manager and build abstraction tool for FPGA/ASIC development☆1,344Updated 2 weeks ago
- A self-contained online book containing a library of FPGA design modules and related coding/design guides.☆447Updated last year
- Hardware Description Languages☆1,069Updated 3 months ago
- Linux on LiteX-VexRiscv☆665Updated last month
- A tutorial for using nmigen☆311Updated 4 years ago
- opensouce RISC-V cpu core implemented in Verilog from scratch in one night!☆2,420Updated 3 months ago
- Documenting the Lattice ECP5 bit-stream format.☆428Updated last month
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,099Updated last month