FPGA Assembly (FASM) Parser and Generator
☆102Jul 25, 2022Updated 3 years ago
Alternatives and similar repositories for fasm
Users that are interested in fasm are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Build Customized FPGA Implementations for Vivado☆381Updated this week
- A Verilog Synthesis Regression Test☆38Jan 19, 2026Updated 4 months ago
- GUI for SymbiYosys☆17Oct 13, 2025Updated 7 months ago
- Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.☆82Feb 9, 2022Updated 4 years ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆308May 20, 2026Updated 3 weeks ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,238Updated this week
- NetCracker is an FPGA architecture analysis tool for facilitating the investigation of connectivity patterns within as well as in between…☆19Dec 4, 2020Updated 5 years ago
- FOSS Flow For FPGA☆438Jan 6, 2025Updated last year
- Documenting the Xilinx 7-series bit-stream format.☆893Jun 5, 2025Updated last year
- FPGA tool performance profiling☆107Feb 24, 2024Updated 2 years ago
- Experimental flows using nextpnr for Xilinx devices☆260Oct 11, 2024Updated last year
- Example designs showing different ways to use F4PGA toolchains.☆288Mar 27, 2024Updated 2 years ago
- Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator☆41Nov 12, 2025Updated 6 months ago
- Cross EDA Abstraction and Automation☆41Nov 17, 2025Updated 6 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Project X-Ray Database: XC7 Series☆76Dec 14, 2021Updated 4 years ago
- A Just-In-Time Compiler for Verilog from VMware Research☆448Jul 1, 2021Updated 4 years ago
- Python interface to FPGA interchange format☆41Oct 19, 2022Updated 3 years ago
- A blinky project for the ULX3S v3.0.3 FPGA board☆17Jan 16, 2026Updated 4 months ago
- ☆13Jun 2, 2026Updated last week
- Source codes and calibration scripts for clock tree synthesis☆40Feb 18, 2020Updated 6 years ago
- ☆60Jul 4, 2022Updated 3 years ago
- SymbiFlow WIP changes for Yosys Open SYnthesis Suite☆41Mar 19, 2024Updated 2 years ago
- A LEF/DEF Utility.☆34Aug 15, 2019Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compil…☆463May 31, 2026Updated last week
- Wishbone bridge over SPI☆11Nov 13, 2019Updated 6 years ago
- Bitstream Fault Analysis Tool☆16Jul 17, 2023Updated 2 years ago
- nextpnr portable FPGA place and route tool☆1,686Updated this week
- Proposed RISC-V Composable Custom Extensions Specification☆70Jun 28, 2025Updated 11 months ago
- A Freepascal library for sending SMS with Twilio☆15Aug 23, 2020Updated 5 years ago
- A padring generator for ASICs☆26May 17, 2023Updated 3 years ago
- Implementation of the core of an exokernel-style operating system☆11Dec 6, 2014Updated 11 years ago
- Demo SoC for SiliconCompiler.☆64Mar 29, 2026Updated 2 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Yosys Open SYnthesis Suite☆4,513Updated this week
- Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formats☆52Apr 8, 2023Updated 3 years ago
- Tool for graphically viewing FPGA bitstream files and their connection to FASM features.☆19Apr 6, 2022Updated 4 years ago
- high abstraction synthesis☆14Apr 8, 2024Updated 2 years ago
- Plugins for Yosys developed as part of the F4PGA project.☆84May 14, 2024Updated 2 years ago
- A Java framework focused on rapid prototyping of new CAD algorithms for FPGA compilation.☆25Dec 17, 2019Updated 6 years ago
- Documenting Lattice's 28nm FPGA parts☆152Feb 26, 2026Updated 3 months ago