os-fpga / GettingStartedWithFPGAsLinks
Content for the FPGA Primer Course offered by the OSFPGA Foundation, Redwood EDA, and VLSI System Design.
☆33Updated last year
Alternatives and similar repositories for GettingStartedWithFPGAs
Users that are interested in GettingStartedWithFPGAs are comparing it to the libraries listed below
Sorting:
- RPHAX provides a quick automation flow to develop and prototype hardware accelerators on Xilinx FPGAs. Currently, the framework has suppo…☆19Updated 2 years ago
- Open source ISS and logic RISC-V 32 bit project☆53Updated this week
- Raptor end-to-end FPGA Compiler and GUI☆80Updated 5 months ago
- Solving Sudokus using open source formal verification tools☆16Updated 2 years ago
- The Open Source Hardware Accelerator for Efficient Neural Network Inference☆46Updated this week
- ☆25Updated this week
- A reference book on System-on-Chip Design☆29Updated last year
- RISC-V Nox core☆64Updated 2 months ago
- The CORE-V CVE2 is a small 32 bit RISC-V CPU core (RV32IMC/EMC) with a two stage pipeline, based on the original zero-riscy work from ETH…☆43Updated last month
- Proposed RISC-V Composable Custom Extensions Specification☆71Updated last year
- ☆59Updated 3 years ago
- Virtual processor co-simulation element for Verilog, VHDL and SystemVerilog environments☆60Updated last week
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- BrightAI B.V. open sources its Blackwire RTL FPGA smartNIC implementation of WireGuard☆48Updated last year
- End-to-End Open-Source I2C GPIO Expander☆31Updated 2 months ago
- ☆14Updated 3 months ago
- Quick'n'dirty FuseSoC+cocotb example☆18Updated 6 months ago
- Slides and material for Xilinx bootcamp☆22Updated 3 years ago
- This repository documents the learning from VSD "RTL Design Using Verilog With SKY130 Technology" workshop☆37Updated 4 years ago
- Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)☆65Updated 3 months ago
- BRISKI ( Barrel RISC-V for Kilo-core Implementations ) is a fast and compact RISC-V barrel processor core that emphasize high throughput …☆24Updated 2 weeks ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆45Updated last year
- SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype☆47Updated 7 months ago
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆17Updated 2 months ago
- Library of open source Process Design Kits (PDKs)☆42Updated this week
- PQR5ASM is a RISC-V Assembler compliant with RV32I☆19Updated last month
- Linux Capable 32-bit RISC-V based SoC in System Verilog☆60Updated 6 months ago
- ☆11Updated 2 years ago
- ☆41Updated 3 years ago
- ☆44Updated 2 years ago