bobbl / rudolvLinks
RISC-V processor
☆31Updated 3 years ago
Alternatives and similar repositories for rudolv
Users that are interested in rudolv are comparing it to the libraries listed below
Sorting:
- ☆22Updated 2 months ago
- USB virtual model in C++ for Verilog☆31Updated 8 months ago
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆30Updated last year
- Demo SoC for SiliconCompiler.☆59Updated last month
- ☆27Updated 4 months ago
- ☆33Updated 2 years ago
- A padring generator for ASICs☆25Updated 2 years ago
- SoftCPU/SoC engine-V☆54Updated 3 months ago
- Open Processor Architecture☆26Updated 9 years ago
- OpenSoC Fabric - A Network-On-Chip Generator☆18Updated 8 years ago
- Using VexRiscv without installing Scala☆38Updated 3 years ago
- A Python package for generating HDL wrappers and top modules for HDL sources☆33Updated this week
- Small SERV-based SoC primarily for OpenMPW tapeout☆44Updated last month
- ☆17Updated 2 years ago
- PicoRV☆44Updated 5 years ago
- FPGA250 aboard the eFabless Caravel☆30Updated 4 years ago
- Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).☆34Updated 9 years ago
- Dual-issue RV64IM processor for fun & learning☆62Updated 2 years ago
- Docker Development Environment for SpinalHDL☆20Updated 11 months ago
- A reconfigurable logic circuit made of identical rotatable tiles.☆22Updated 3 years ago
- Project aimed at implementing floating point operators using the DSP48E1 slice.☆29Updated 12 years ago
- Small footprint and configurable Inter-Chip communication cores☆60Updated last week
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Updated 2 years ago
- A small 32-bit implementation of the RISC-V architecture☆32Updated 4 years ago
- SCARV: a side-channel hardened RISC-V platform☆27Updated 2 years ago
- Bitstream relocation and manipulation tool.☆47Updated 2 years ago
- RISC-V Processor written in Amaranth HDL☆38Updated 3 years ago
- Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks☆89Updated 6 years ago
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆21Updated 5 years ago
- Featherweight RISC-V implementation☆52Updated 3 years ago