m-labs / migenLinks
A Python toolbox for building complex digital hardware
☆1,306Updated 3 months ago
Alternatives and similar repositories for migen
Users that are interested in migen are comparing it to the libraries listed below
Sorting:
- Package manager and build abstraction tool for FPGA/ASIC development☆1,345Updated 3 weeks ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,093Updated last week
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆679Updated 3 years ago
- nextpnr portable FPGA place and route tool☆1,526Updated this week
- Documenting the Xilinx 7-series bit-stream format.☆828Updated 3 months ago
- The MyHDL development repository☆1,098Updated 5 months ago
- VHDL compiler and simulator☆738Updated last week
- VUnit is a unit testing framework for VHDL/SystemVerilog☆792Updated last month
- SERV - The SErial RISC-V CPU☆1,651Updated last week
- A modern hardware definition language and toolchain based on Python☆1,797Updated 3 weeks ago
- IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Techn…☆593Updated 2 months ago
- A small, light weight, RISC CPU soft core☆1,466Updated last month
- Modular hardware build system☆1,088Updated this week
- Documenting the Lattice ECP5 bit-stream format.☆427Updated 2 weeks ago
- Linux on LiteX-VexRiscv☆659Updated 2 weeks ago
- An abstraction library for interfacing EDA tools☆715Updated last week
- Universal utility for programming FPGA☆1,434Updated last week
- cocotb: Python-based chip (RTL) verification☆2,102Updated this week
- Open source ecosystem for open FPGA boards☆893Updated this week
- Multi-platform nightly builds of open source digital design and verification tools☆1,167Updated last week
- Verilog library for ASIC and FPGA designers☆1,339Updated last year
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆674Updated 2 months ago
- Build your hardware, easily!☆3,512Updated last week
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆677Updated last week
- Hardware Description Languages☆1,068Updated 2 months ago
- Place and route tool for FPGAs☆424Updated 6 years ago
- An open-source static random access memory (SRAM) compiler.☆952Updated 3 months ago
- An Open-source FPGA IP Generator☆1,002Updated this week
- Small footprint and configurable PCIe core☆585Updated last month
- mor1kx - an OpenRISC 1000 processor IP core☆554Updated last month