m-labs / migenLinks
A Python toolbox for building complex digital hardware
☆1,320Updated 3 weeks ago
Alternatives and similar repositories for migen
Users that are interested in migen are comparing it to the libraries listed below
Sorting:
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆682Updated 4 years ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,384Updated this week
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,127Updated 4 months ago
- nextpnr portable FPGA place and route tool☆1,602Updated this week
- Documenting the Xilinx 7-series bit-stream format.☆847Updated 7 months ago
- The MyHDL development repository☆1,109Updated 9 months ago
- A modern hardware definition language and toolchain based on Python☆1,894Updated last week
- VHDL compiler and simulator☆769Updated this week
- Linux on LiteX-VexRiscv☆682Updated last month
- The PoC Library has been forked to github.com/VHDL/PoC. See new address below☆600Updated 6 months ago
- Documenting the Lattice ECP5 bit-stream format.☆441Updated 3 months ago
- SERV - The SErial RISC-V CPU☆1,745Updated 3 weeks ago
- Universal utility for programming FPGA☆1,535Updated this week
- VUnit is a unit testing framework for VHDL/SystemVerilog☆812Updated 3 weeks ago
- Modular hardware build system☆1,124Updated this week
- An abstraction library for interfacing EDA tools☆747Updated last week
- A small, light weight, RISC CPU soft core☆1,503Updated last month
- Open source ecosystem for open FPGA boards☆948Updated this week
- Build your hardware, easily!☆3,705Updated this week
- Multi-platform nightly builds of open source digital design and verification tools☆1,340Updated this week
- cocotb: Python-based chip (RTL) verification☆2,248Updated this week
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆681Updated 6 months ago
- Verilog library for ASIC and FPGA designers☆1,394Updated last year
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆696Updated last week
- 🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…☆1,974Updated this week
- The original high performance and small footprint system-on-chip based on Migen™☆340Updated 3 weeks ago
- Place and route tool for FPGAs☆424Updated 6 years ago
- An Open-source FPGA IP Generator☆1,044Updated this week
- VHDL synthesis (based on ghdl)☆354Updated 3 weeks ago
- Small footprint and configurable PCIe core☆657Updated last week