Alternatives and similar repositories for migen

Users that are interested in migen are comparing it to the libraries listed below

• olofk / fusesoc
  Package manager and build abstraction tool for FPGA/ASIC development
  ☆1,376Updated this week
• m-labs / nmigen
  A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen
  ☆679Updated 3 years ago
• YosysHQ / nextpnr
  nextpnr portable FPGA place and route tool
  ☆1,574Updated this week
• YosysHQ / icestorm
  Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
  ☆1,117Updated 3 months ago
• myhdl / myhdl
  The MyHDL development repository
  ☆1,105Updated 8 months ago
• f4pga / prjxray
  Documenting the Xilinx 7-series bit-stream format.
  ☆841Updated 6 months ago
• nickg / nvc
  VHDL compiler and simulator
  ☆759Updated this week
• amaranth-lang / amaranth
  A modern hardware definition language and toolchain based on Python
  ☆1,863Updated 3 weeks ago
• VUnit / vunit
  VUnit is a unit testing framework for VHDL/SystemVerilog
  ☆804Updated this week
• olofk / serv
  SERV - The SErial RISC-V CPU
  ☆1,711Updated last week
• VLSI-EDA / PoC
  The PoC Library has been forked to github.com/VHDL/PoC. See new address below
  ☆599Updated 4 months ago
• YosysHQ / prjtrellis
  Documenting the Lattice ECP5 bit-stream format.
  ☆435Updated last month
• litex-hub / linux-on-litex-vexriscv
  Linux on LiteX-VexRiscv
  ☆672Updated 2 weeks ago
• olofk / edalize
  An abstraction library for interfacing EDA tools
  ☆731Updated this week
• ZipCPU / zipcpu
  A small, light weight, RISC CPU soft core
  ☆1,489Updated 2 weeks ago
• cocotb / cocotb
  cocotb: Python-based chip (RTL) verification
  ☆2,185Updated last week
• FPGAwars / apio
  Open source ecosystem for open FPGA boards
  ☆935Updated this week
• trabucayre / openFPGALoader
  Universal utility for programming FPGA
  ☆1,498Updated last week
• YosysHQ / oss-cad-suite-build
  Multi-platform nightly builds of open source digital design and verification tools
  ☆1,281Updated this week
• siliconcompiler / siliconcompiler
  Modular hardware build system
  ☆1,113Updated this week
• sergeykhbr / riscv_vhdl
  Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators
  ☆678Updated 5 months ago
• aolofsson / oh
  Verilog library for ASIC and FPGA designers
  ☆1,377Updated last year
• ghdl / ghdl-yosys-plugin
  VHDL synthesis (based on ghdl)
  ☆354Updated this week
• UVVM / UVVM
  UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of …
  ☆419Updated 3 weeks ago
• enjoy-digital / litex
  Build your hardware, easily!
  ☆3,645Updated this week
• projf / projf-explore
  Project F brings FPGAs to life with exciting open-source designs you can build on.
  ☆737Updated 11 months ago
• SpinalHDL / VexRiscv
  A FPGA friendly 32 bit RISC-V CPU implementation
  ☆2,947Updated last week
• stnolting / neorv32
  🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…
  ☆1,935Updated this week
• enjoy-digital / litepcie
  Small footprint and configurable PCIe core
  ☆647Updated last month
• JulianKemmerer / PipelineC
  A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …
  ☆692Updated 2 weeks ago