YosysHQ / prjtrellis
Documenting the Lattice ECP5 bit-stream format.
☆411Updated this week
Alternatives and similar repositories for prjtrellis:
Users that are interested in prjtrellis are comparing it to the libraries listed below
- VHDL synthesis (based on ghdl)☆334Updated 2 weeks ago
- Multi-platform nightly builds of open source FPGA tools☆296Updated 3 years ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆282Updated this week
- 32-bit RISC-V system on chip for iCE40 FPGAs☆305Updated last year
- Documenting the Xilinx 7-series bit-stream format.☆797Updated this week
- Small footprint and configurable DRAM core☆410Updated last week
- Example designs showing different ways to use F4PGA toolchains.☆275Updated last year
- An open source USB bootloader for FPGAs☆361Updated last year
- The original high performance and small footprint system-on-chip based on Migen™☆326Updated last month
- PCB for ULX3S FPGA R&D board☆391Updated last week
- Experimental flows using nextpnr for Xilinx devices☆234Updated 6 months ago
- Small footprint and configurable Ethernet core☆236Updated 2 weeks ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,053Updated last month
- Linux on LiteX-VexRiscv☆633Updated last month
- LiteX boards files☆404Updated this week
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆669Updated 3 years ago
- FOSS Flow For FPGA☆386Updated 4 months ago
- A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.☆202Updated 3 years ago
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆653Updated this week
- An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!☆217Updated 2 years ago
- nextpnr portable FPGA place and route tool☆1,425Updated this week
- Package manager and build abstraction tool for FPGA/ASIC development☆1,276Updated 2 weeks ago
- A 32-bit RISC-V soft processor☆313Updated 2 months ago
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆453Updated 3 weeks ago
- A simple, basic, formally verified UART controller☆300Updated last year
- A self-contained online book containing a library of FPGA design modules and related coding/design guides.☆427Updated 7 months ago
- A simple RISC-V processor for use in FPGA designs.☆271Updated 8 months ago
- Place and route tool for FPGAs☆420Updated 5 years ago
- Project Apicula 🐝: bitstream documentation for Gowin FPGAs☆551Updated this week
- A tutorial for using nmigen☆309Updated 4 years ago