amaranth-lang / amaranth
A modern hardware definition language and toolchain based on Python
☆1,621Updated this week
Alternatives and similar repositories for amaranth:
Users that are interested in amaranth are comparing it to the libraries listed below
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆664Updated 3 years ago
- A Python toolbox for building complex digital hardware☆1,247Updated 2 weeks ago
- SERV - The SErial RISC-V CPU☆1,474Updated last month
- nextpnr portable FPGA place and route tool☆1,360Updated this week
- Build your hardware, easily!☆3,132Updated this week
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,022Updated last week
- Multi-platform nightly builds of open source digital design and verification tools☆937Updated this week
- A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent …☆1,652Updated this week
- Universal utility for programming FPGA☆1,254Updated this week
- Package manager and build abstraction tool for FPGA/ASIC development☆1,235Updated 2 weeks ago
- Documenting the Xilinx 7-series bit-stream format.☆781Updated this week
- Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pi…☆1,342Updated last month
- Linux on LiteX-VexRiscv☆605Updated 6 months ago
- Modular hardware build system☆909Updated this week
- Project F brings FPGAs to life with exciting open-source designs you can build on.☆614Updated last week
- A FPGA friendly 32 bit RISC-V CPU implementation☆2,637Updated this week
- Yosys Open SYnthesis Suite☆3,612Updated this week
- PicoRV32 - A Size-Optimized RISC-V CPU☆3,234Updated 7 months ago
- A tutorial for using nmigen☆310Updated 3 years ago
- Project Apicula 🐝: bitstream documentation for Gowin FPGAs☆525Updated last week
- A small, light weight, RISC CPU soft core☆1,345Updated 2 months ago
- A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …☆623Updated this week
- Open source ecosystem for open FPGA boards☆816Updated last week
- cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python☆1,871Updated this week
- Documenting the Lattice ECP5 bit-stream format.☆404Updated 2 weeks ago
- Hardware Description Languages☆984Updated 5 months ago
- Bluespec Compiler (BSC)☆970Updated this week
- FOSS Flow For FPGA☆368Updated 3 weeks ago
- A self-contained online book containing a library of FPGA design modules and related coding/design guides.☆408Updated 4 months ago
- Scala based HDL☆1,719Updated this week