A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen
☆687Jan 8, 2022Updated 4 years ago
Alternatives and similar repositories for nmigen
Users that are interested in nmigen are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A modern hardware definition language and toolchain based on Python☆2,053Updated this week
- A tutorial for using nmigen☆314Mar 17, 2021Updated 5 years ago
- A Python toolbox for building complex digital hardware☆1,329Jan 5, 2026Updated 6 months ago
- Board and connector definition files for nMigen☆30Sep 22, 2020Updated 5 years ago
- A 32-bit RISC-V soft processor☆328Jan 26, 2026Updated 5 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Documenting Lattice's 28nm FPGA parts☆153Updated this week
- Documenting the Lattice ECP5 bit-stream format.☆463May 9, 2026Updated 2 months ago
- nextpnr portable FPGA place and route tool☆1,710Updated this week
- Industry standard I/O for nMigen☆12Apr 23, 2020Updated 6 years ago
- Build your hardware, easily!☆3,998Updated this week
- Scots Army Knife for electronics☆2,173Updated this week
- The original high performance and small footprint system-on-chip based on Migen™☆343Jan 5, 2026Updated 6 months ago
- Resource-efficient 16-bit CPU architecture for FPGA control plane☆97Feb 20, 2025Updated last year
- Yosys Open SYnthesis Suite☆4,612Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- I want to learn [n]Migen.☆44Jan 26, 2020Updated 6 years ago
- Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and pi…☆1,427Jun 18, 2026Updated last month
- Multi-platform nightly builds of open source FPGA tools☆306Nov 3, 2021Updated 4 years ago
- A 6800 CPU written in nMigen☆49Jun 16, 2021Updated 5 years ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,435Jul 2, 2026Updated 2 weeks ago
- System on Chip toolkit for Amaranth HDL☆101May 23, 2026Updated last month
- Documenting the Xilinx 7-series bit-stream format.☆903Jun 5, 2025Updated last year
- Board definitions for Amaranth HDL☆127Jun 20, 2026Updated last month
- WebAssembly-based Yosys distribution for Amaranth HDL☆29Jun 30, 2026Updated 3 weeks ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- An abstraction library for interfacing EDA tools☆780Jul 2, 2026Updated 2 weeks ago
- ☆64Jul 21, 2020Updated 5 years ago
- Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)☆1,177Feb 26, 2026Updated 4 months ago
- PCB for ULX3S FPGA R&D board☆447Apr 27, 2025Updated last year
- Linux on LiteX-VexRiscv☆727Jun 22, 2026Updated 3 weeks ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆103May 16, 2023Updated 3 years ago
- ECP5 breakout board in a feather physical format☆534Nov 6, 2024Updated last year
- Visual editor for open FPGA boards☆1,916Jul 8, 2026Updated last week
- Amaranth HDL framework for monitoring, hacking, and developing USB devices☆1,127Jun 4, 2026Updated last month
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- A FPGA friendly 32 bit RISC-V CPU implementation☆3,196Feb 11, 2026Updated 5 months ago
- SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows☆533Updated this week
- An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!☆222May 21, 2022Updated 4 years ago
- Example litex Risc-V SOC and some example code projects in multiple languages.☆72May 24, 2026Updated last month
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆31Dec 6, 2021Updated 4 years ago
- 32-bit RISC-V system on chip for iCE40 FPGAs☆317May 25, 2023Updated 3 years ago
- SERV - The SErial RISC-V CPU☆1,831Jul 10, 2026Updated last week