litex-hub / litex-boardsLinks
LiteX boards files
☆408Updated last week
Alternatives and similar repositories for litex-boards
Users that are interested in litex-boards are comparing it to the libraries listed below
Sorting:
- current focus on Colorlight i5 and i9 & i9plus module☆294Updated 7 months ago
- USB3 PIPE interface for Xilinx 7-Series☆215Updated 3 years ago
- Multi-platform nightly builds of open source FPGA tools☆296Updated 3 years ago
- Small footprint and configurable DRAM core☆414Updated last week
- Small footprint and configurable Ethernet core☆240Updated last week
- Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation☆271Updated last year
- Public repository for Litefury & Nitefury☆291Updated 11 months ago
- A full-speed device-side USB peripheral core written in Verilog.☆231Updated 2 years ago
- Project Apicula 🐝: bitstream documentation for Gowin FPGAs☆554Updated this week
- Example designs showing different ways to use F4PGA toolchains.☆276Updated last year
- SoC based on VexRiscv and ICE40 UP5K☆158Updated 2 months ago
- Example LED blinking project for your FPGA dev board of choice☆175Updated last week
- Linux on LiteX-VexRiscv☆636Updated 3 weeks ago
- SD-Card controller, using either SPI, SDIO, or eMMC interfaces☆286Updated last month
- iCESugar FPGA Board (base on iCE40UP5k)☆392Updated last month
- A self-contained online book containing a library of FPGA design modules and related coding/design guides.☆432Updated 8 months ago
- Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)☆252Updated last year
- Small footprint and configurable PCIe core☆549Updated last week
- Experimental flows using nextpnr for Xilinx devices☆237Updated 7 months ago
- A simple, basic, formally verified UART controller☆303Updated last year
- FOSS Flow For FPGA☆389Updated 4 months ago
- PCB for ULX3S FPGA R&D board☆393Updated last month
- USB Serial on the TinyFPGA BX☆136Updated 3 years ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆288Updated this week
- A Verilog implementation of DisplayPort protocol for FPGAs☆249Updated 6 years ago
- Documenting the Lattice ECP5 bit-stream format.☆415Updated last month
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆169Updated last year
- Opensource DDR3 Controller☆333Updated last week
- VHDL synthesis (based on ghdl)☆335Updated last week
- FPGA 101 lessons/labs☆382Updated 10 months ago