YosysHQ / icestormLinks
Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)
☆1,114Updated 2 months ago
Alternatives and similar repositories for icestorm
Users that are interested in icestorm are comparing it to the libraries listed below
Sorting:
- nextpnr portable FPGA place and route tool☆1,571Updated this week
- Open source ecosystem for open FPGA boards☆931Updated this week
- Documenting the Xilinx 7-series bit-stream format.☆840Updated 6 months ago
- A Python toolbox for building complex digital hardware☆1,316Updated 2 months ago
- Place and route tool for FPGAs☆423Updated 6 years ago
- Documenting the Lattice ECP5 bit-stream format.☆434Updated last month
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆679Updated 3 years ago
- Package manager and build abstraction tool for FPGA/ASIC development☆1,373Updated last week
- Universal utility for programming FPGA☆1,495Updated this week
- Multi-platform nightly builds of open source digital design and verification tools☆1,267Updated this week
- Linux on LiteX-VexRiscv☆670Updated last week
- Learn how to design digital systems and synthesize them into an FPGA using only opensource tools☆839Updated 5 years ago
- VHDL compiler and simulator☆758Updated this week
- A modern hardware definition language and toolchain based on Python☆1,862Updated 2 weeks ago
- Visual editor for open FPGA boards☆1,846Updated last week
- PCB for ULX3S FPGA R&D board☆417Updated 7 months ago
- SERV - The SErial RISC-V CPU☆1,707Updated last week
- Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators☆678Updated 5 months ago
- Small and low cost FPGA educational and development board☆640Updated 10 months ago
- Project Apicula 🐝: bitstream documentation for Gowin FPGAs☆608Updated last week
- VUnit is a unit testing framework for VHDL/SystemVerilog☆803Updated this week
- Project F brings FPGAs to life with exciting open-source designs you can build on.☆737Updated 10 months ago
- The PoC Library has been forked to github.com/VHDL/PoC. See new address below☆599Updated 4 months ago
- VHDL synthesis (based on ghdl)☆353Updated last month
- 🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…☆1,930Updated this week
- ECP5 breakout board in a feather physical format☆507Updated last year
- mor1kx - an OpenRISC 1000 processor IP core☆568Updated 3 months ago
- Yosys Open SYnthesis Suite☆4,174Updated this week
- An open source USB bootloader for FPGAs☆387Updated 2 years ago
- A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz☆412Updated last month