Alternatives and similar repositories for nmigen-boards:

Users that are interested in nmigen-boards are comparing it to the libraries listed below

• emard / ulx3s-misc
  Miscellaneous ULX3S examples (advanced)
  ☆75Updated last week
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆38Updated last year
• clairexen / picorv
  PicoRV
  ☆44Updated 4 years ago
• RobertBaruch / nmigen-exercises
  Graded exercises for nMigen (WIP)
  ☆56Updated 4 years ago
• ECP5-PCIe / ECP5-PCIe
  Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
  ☆94Updated last year
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆32Updated 3 years ago
• GuzTech / misato
  RISC-V Processor written in Amaranth HDL
  ☆36Updated 3 years ago
• kbob / nmigen-examples
  I want to learn [n]Migen.
  ☆40Updated 5 years ago
• m-labs / VexRiscv-verilog
  Using VexRiscv without installing Scala
  ☆37Updated 3 years ago
• amaranth-lang / amaranth-stdio
  Industry standard I/O for Amaranth HDL
  ☆28Updated 3 months ago
• ZipCPU / wbscope
  A wishbone controlled scope for FPGA's
  ☆74Updated last year
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆112Updated 3 years ago
• lawrie / tiny_usb_examples
  Using the TinyFPGA BX USB code in user designs
  ☆49Updated 5 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated last year
• apertus-open-source-cinema / naps
  An experiment for building gateware for the axiom micro / beta using amaranth-hdl
  ☆40Updated 9 months ago
• whitequark / Yumewatari
  妖刀夢渡
  ☆59Updated 5 years ago
• m-labs / nmigen-stdio
  Industry standard I/O for nMigen
  ☆12Updated 4 years ago
• sparrowgrine / prjtritium
  ☆22Updated 2 years ago
• azonenberg / antikernel-ipcores
  FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations
  ☆62Updated this week
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆54Updated 3 weeks ago
• kbeckmann / pergola_projects
  My pergola FPGA projects
  ☆30Updated 3 years ago
• amaranth-lang / amaranth-soc
  System on Chip toolkit for Amaranth HDL
  ☆86Updated 3 months ago
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆85Updated 4 months ago
• olofk / observer
  ☆40Updated 4 years ago
• lambdaconcept / lambdasoc
  ☆43Updated 10 months ago
• lawrie / ulx3s_examples
  Example Verilog code for Ulx3s
  ☆40Updated 2 years ago
• m-labs / microscope
  Finding the bacteria in rotting FPGA designs.
  ☆13Updated 4 years ago
• mattvenn / magic-inverter
  an inverter drawn in magic with makefile to simulate
  ☆26Updated 2 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆30Updated 4 years ago
• kazkojima / colorlight-i5-tips
  Tiny tips for Colorlight i5 FPGA board
  ☆56Updated 3 years ago