hriener / lorina
C++ parsing library for simple formats used in logic synthesis and formal verification
☆35Updated 7 months ago
Alternatives and similar repositories for lorina:
Users that are interested in lorina are comparing it to the libraries listed below
- C++ header-only exact synthesis library☆15Updated 2 years ago
- An advanced header-only exact synthesis library☆24Updated 2 years ago
- ☆14Updated 4 years ago
- C++ header-only reasoning library☆13Updated 6 months ago
- DATuner Repository☆18Updated 6 years ago
- C++ truth table library☆51Updated 10 months ago
- CoreIR Symbolic Analyzer☆63Updated 4 years ago
- QuteRTL: A RTL Front-End Towards Intelligent Synthesis and Verification☆14Updated 8 years ago
- IDEA project source files☆102Updated 2 months ago
- Showcase examples for EPFL logic synthesis libraries☆192Updated 9 months ago
- Parsing library for BLIF netlists☆18Updated 2 months ago
- A polyhedral compiler for hardware accelerators☆55Updated 6 months ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆48Updated last year
- OpenPiton Design Benchmark☆24Updated last year
- C++ logic network library☆221Updated 3 months ago
- EDA physical synthesis optimization kit☆50Updated last year
- netlistDB - Intermediate format for digital hardware representation with graph database API☆30Updated 3 years ago
- E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis (DAC 2024)☆27Updated 6 months ago
- A circuit toolkit☆96Updated 4 years ago
- Optimization results for superconducting electronic (SCE) circuits☆12Updated last year
- A hardware synthesis framework with multi-level paradigm☆36Updated 3 weeks ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆58Updated 2 years ago
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆29Updated last year
- Library to compile Chisel circuits using LLVM/MLIR (CIRCT)☆70Updated last year
- AMulet 2. - A better AIG Multiplier Examination Tool☆21Updated 2 years ago
- ☆15Updated last year
- Next generation CGRA generator☆108Updated this week
- Runtime-First FPGA Interchange Routing Contest @ FPGA’24☆31Updated 2 months ago
- Collection of digital hardware modules & projects (benchmarks)☆37Updated 2 months ago
- A logic synthesis tool☆72Updated 2 years ago