OpenPiton Design Benchmark
☆28Mar 6, 2023Updated 3 years ago
Alternatives and similar repositories for OPDB
Users that are interested in OPDB are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- IDEA project source files☆114Apr 15, 2026Updated 2 months ago
- UW reference flow for Free45PDK and The OpenROAD Project☆13Jun 5, 2020Updated 6 years ago
- Benchmarks for Yosys development☆24Feb 17, 2020Updated 6 years ago
- MAPLE's hardware-software co-design allows programs to perform long-latency memory accesses asynchronously from the core, avoiding pipeli…☆22Feb 22, 2024Updated 2 years ago
- Alogic is a Medium Level Synthesis language for digital logic that compiles swiftly into standard Verilog-2005 for implementation in ASIC…☆19May 19, 2021Updated 5 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Open-source FPGA research and prototyping framework.☆212Aug 8, 2024Updated last year
- EPFL logic synthesis benchmarks☆257May 6, 2026Updated last month
- Multiple approaches to statistical simulation for computer architects☆14Jun 1, 2020Updated 6 years ago
- OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…☆150Jul 23, 2025Updated 11 months ago
- The OpenPiton Platform☆800Feb 25, 2026Updated 4 months ago
- Verilog code of Loongson's GS132 core☆12Dec 19, 2019Updated 6 years ago
- ☆24Nov 10, 2020Updated 5 years ago
- Verilog projects for simulation and logic synthesis (Icarus Verilog, YOSYS)☆22Apr 28, 2021Updated 5 years ago
- AltOr32 - Alternative Lightweight OpenRisc CPU☆13Dec 17, 2015Updated 10 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆23Mar 28, 2023Updated 3 years ago
- Rust proof-of-concept for GPU waveform rendering☆13Jul 22, 2020Updated 5 years ago
- AVR CPU Core Implementation in Verilog HDL.☆15Oct 28, 2018Updated 7 years ago
- 64-bit MISC Architecture CPU☆13Dec 13, 2016Updated 9 years ago
- GDS visualization, geometry analysis, and parallelized capacitance extraction at field-solver accuracy. MS thesis project.☆26Jul 1, 2024Updated 2 years ago
- An open-source custom cache generator.☆37Mar 14, 2024Updated 2 years ago
- ☆15Jul 28, 2022Updated 3 years ago
- Hardware implementation of ORAM☆24Jul 12, 2017Updated 8 years ago
- Papers, Posters, Presentations, Documentation...☆20Jan 9, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Experimental breakout board for a signle 200-ball WFBGA LPDDR4 chip in SO-DIMM DDR4 form factor.☆23Dec 11, 2025Updated 6 months ago
- Benchmarks for Approximate Circuit Synthesis☆17Aug 2, 2020Updated 5 years ago
- DTMF Receiver: Logic Synthesis and Physical Design using genus and innovus in 90nm process node☆18Dec 1, 2023Updated 2 years ago
- ABC: System for Sequential Logic Synthesis and Formal Verification☆1,192Updated this week
- An open source tool for testing and profiling FaaS and serverless platforms☆111May 27, 2026Updated last month
- ILP SAT Detailed Router☆13Apr 14, 2020Updated 6 years ago
- Verilog IP Cores & Tests☆13May 3, 2018Updated 8 years ago
- ☆12Feb 9, 2020Updated 6 years ago
- Drivers - Camera Module products equipped with OIS☆19Mar 4, 2024Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Verilog CAN controller that is compatible to the SJA 1000.☆17Apr 17, 2021Updated 5 years ago
- A unified simulation platform that combines hardware and software, enabling pre-silicon, full-stack, closed-loop evaluation of your robot…☆47Apr 9, 2025Updated last year
- ☆12Mar 22, 2022Updated 4 years ago
- powerpc processor prototype and an example of semiconductor startup biz plan☆14Feb 2, 2019Updated 7 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆50Nov 18, 2024Updated last year
- Concurrent CPU-GPU Programming using Task Models☆109Dec 19, 2019Updated 6 years ago
- Synthesis using Synopsys DC and Physical Design flow using Synopsys ICC II, of my RISC-V 5 stage pipelined using 32 nm tech repo☆15Jul 31, 2024Updated last year