msoeken / aliceLinks
C++ command shell library
☆52Updated last year
Alternatives and similar repositories for alice
Users that are interested in alice are comparing it to the libraries listed below
Sorting:
- netlistDB - Intermediate format for digital hardware representation with graph database API☆32Updated 4 years ago
- C++ header-only reasoning library☆17Updated last year
- An advanced header-only exact synthesis library☆30Updated 3 years ago
- Collection of test cases for Yosys☆17Updated 4 years ago
- C++ parsing library for simple formats used in logic synthesis and formal verification☆39Updated last year
- A circuit toolkit☆106Updated 5 years ago
- Parsing library for BLIF netlists☆19Updated last year
- ☆12Updated this week
- C++17 implementation of an AST for Verilog code generation☆24Updated 2 years ago
- C++ truth table library☆64Updated 5 months ago
- The PE for the second generation CGRA (garnet).☆18Updated 8 months ago
- FPGA Assembly (FASM) Parser and Generator☆99Updated 3 years ago
- Benchmarks for Yosys development☆24Updated 5 years ago
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆63Updated last year
- IO and Pin Placer for Floorplan-Placement Subflow☆23Updated 5 years ago
- A collection of big designs to run post-synthesis simulations with yosys☆51Updated 10 years ago
- A library and command-line tool for querying a Verilog netlist.☆29Updated 3 years ago
- ☆20Updated 4 years ago
- SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research☆38Updated last year
- C++ header-only exact synthesis library☆18Updated 3 years ago
- Welcome to Birds-of-a-Feather: Open-Source-Academic-EDA-Software !☆13Updated 6 years ago
- Visual Simulation of Register Transfer Logic☆109Updated 5 months ago
- EpicSim Project☆71Updated 4 years ago
- Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation☆231Updated this week
- IRSIM switch-level simulator for digital circuits☆35Updated 2 months ago
- Python implementations of fixed size hardware types (Bit, BitVector, UInt, SInt, ...) based on the SMT-LIB2 semantics☆18Updated 2 years ago
- RISC-V GPGPU☆36Updated 5 years ago
- Open source EDA chip design flow☆51Updated 8 years ago
- GUI for SymbiYosys☆17Updated 3 months ago
- ☆21Updated 2 years ago