Alternatives and similar repositories for NyuziToolchain

Users that are interested in NyuziToolchain are comparing it to the libraries listed below

• jbush001 / PASC
  Parallel Array of Simple Cores. Multicore processor.
  ☆100Updated 6 years ago
• ccelio / riscv-boom-doc
  Documentation for the BOOM processor
  ☆47Updated 8 years ago
• tvanas / r-vex
  A reconfigurable and extensible VLIW processor implemented in VHDL
  ☆34Updated 10 years ago
• ucb-bar / zscale
  Z-scale Microarchitectural Implementation of RV32 ISA
  ☆55Updated 8 years ago
• csail-csg / riscy
  Riscy Processors - Open-Sourced RISC-V Processors
  ☆74Updated 6 years ago
• eliaskousk / parallella-riscv
  RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
  ☆101Updated 6 years ago
• laforest / Octavo
  Verilog FPGA Parts Library. Old Octavo soft-CPU project.
  ☆75Updated 6 years ago
• openrisc / orpsoc-cores
  Core description files for FuseSoC
  ☆124Updated 5 years ago
• Domipheus / TPU
  TPU, The Test Processing Unit. Or Terrible Processing Unit. A simple 16-bit CPU in VHDL for education as to the dataflow within a CPU. De…
  ☆148Updated 8 years ago
• etherzhhb / Shang
  The Shang high-level synthesis framework
  ☆120Updated 11 years ago
• maidenone / ORGFXSoC
  An Example implementation of Open Source Graphics Accelerator, (A fixed point, fixed function pipeline GPU)
  ☆72Updated 13 years ago
• rsnikhil / RISCV_Piccolo_v1
  Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).
  ☆34Updated 9 years ago
• terpstra / opa
  Open Processor Architecture
  ☆26Updated 9 years ago
• scale-lab / la-core
  Linear algebra accelerators for RISC-V (published in ICCD 17)
  ☆66Updated 7 years ago
• malkadi / FGPU
  FGPU is a soft GPU architecture general purpose computing
  ☆58Updated 4 years ago
• westerndigitalcorporation / swerv-ISS
  Western Digital’s Open Source RISC-V SweRV Instruction Set Simulator
  ☆203Updated 4 years ago
• tommythorn / yarvi
  Yet Another RISC-V Implementation
  ☆96Updated 9 months ago
• ucb-bar / esp-llvm
  UCB-BAR fork of LLVM! NOT UPSTREAM RISCV LLVM
  ☆125Updated 4 years ago
• m-labs / lm32
  LatticeMico32 soft processor
  ☆106Updated 10 years ago
• t-crest / patmos
  Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project
  ☆144Updated last month
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆181Updated 6 months ago
• jerry-D / SYMPL-GP-GPU-Compute-Engines
  Single, dual, quad, eight, and sixteen-shader GP-GPU-Compute engines, along with 32-bit SYMPL RISC CPU and Coarse-Grained Scheduler, in o…
  ☆22Updated 6 years ago
• cpc / openasip
  Open Application-Specific Instruction Set processor tools (OpenASIP)
  ☆160Updated last month
• librecores / riscv-sodor
  educational microarchitectures for risc-v isa
  ☆66Updated 6 years ago
• jbush001 / ChiselGPU
  Experiments with fixed function renderers and Chisel HDL
  ☆59Updated 6 years ago
• rbkettlewell / trollstigen-fpga
  Open source fpga project leveraging vtr CAD flow.
  ☆26Updated 2 years ago
• LEAP-FPGA / leap-documentation
  ☆24Updated 9 years ago
• onchipuis / mriscvcore
  A 32-bit RISC-V processor for mriscv project
  ☆58Updated 8 years ago
• pulp-platform / bigpulp
  ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform
  ☆51Updated 3 years ago
• intel / rapid-design-methods-for-developing-hardware-accelerators
  ☆88Updated 2 years ago