Parallel Array of Simple Cores. Multicore processor.
☆101May 16, 2019Updated 7 years ago
Alternatives and similar repositories for PASC
Users that are interested in PASC are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Minimal microprocessor☆21Jul 1, 2017Updated 9 years ago
- Super scalar Processor design☆21Sep 7, 2014Updated 12 years ago
- Just experimenting with Open Source SoCs on my Altera dev kit.☆12Feb 10, 2012Updated 14 years ago
- 32-bit RISC processor☆24Jan 7, 2019Updated 7 years ago
- Experiments with fixed function renderers and ChiselHDL☆61Updated this week
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- ASIC Design lab. Pipelined, Cached, Multicore MIPS Processor☆11Aug 23, 2017Updated 9 years ago
- System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆22Oct 19, 2026Updated 2 weeks ago
- Video Effects on VGA☆15Jan 7, 2019Updated 7 years ago
- Pipelined DCPU-16 Verilog Implementation☆42May 30, 2012Updated 14 years ago
- GPGPU microprocessor architecture☆2,232Updated this week
- Port of LLVM/Clang C compiler to Nyuzi parallel processor architecture☆66Dec 4, 2022Updated 3 years ago
- mor1kx - an OpenRISC 1000 processor IP core☆593Jun 6, 2026Updated 4 months ago
- Single, dual, quad, eight, and sixteen-shader GP-GPU-Compute engines, along with 32-bit SYMPL RISC CPU and Coarse-Grained Scheduler, in o…☆22Jan 2, 2019Updated 7 years ago
- Resources from my class on computer architecture design☆10Apr 25, 2018Updated 8 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆14Oct 19, 2026Updated 2 weeks ago
- Multi-threaded 32-bit embedded core family.☆24Jul 9, 2012Updated 14 years ago
- MIPS R3000 processor verilog code to be synthesized on Spartan 3E FPGA board.☆25Oct 3, 2018Updated 8 years ago
- Microprogrammed 65C02-compatible FPGA Processor Core (Verilog-2001)☆56Sep 18, 2016Updated 10 years ago
- Repository to hold fabscalar project and simulations☆13Mar 17, 2015Updated 11 years ago
- Gesture Recognition Based on ALTERA DE2-115 FPGA☆12Mar 18, 2014Updated 12 years ago
- OpenGL-like graphics pipeline on a Xilinx FPGA☆35Dec 14, 2010Updated 15 years ago
- Stack CPU Work In Progress☆29Jul 16, 2026Updated 3 months ago
- [UNRELEASED] FP div/sqrt unit for transprecision☆28Jul 27, 2026Updated 3 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Computer Architecture course's project Fall 2018, Innopolis University.☆10Dec 6, 2018Updated 7 years ago
- 机器人使用了Xilinx的SPARTAN-6系列芯片以及ISE设计工具对机器人控制电路进行了设计和仿真，验证了电路的正确性和可靠性。同时机器人使用了温湿度传感器、人体感应传感器、超声波传感器、震动传感器、有毒气体传感器等，可以对灾区的环境和受困人员进行多方面的检测和响应。还…☆12Nov 15, 2023Updated 2 years ago
- a fast multiplier implement using verilog☆13Dec 23, 2014Updated 11 years ago
- SPIR-V fragment shader GPU core based on RISC-V☆48May 26, 2021Updated 5 years ago
- OpenReroc (Open source Reconfigurable robot component)☆10Oct 17, 2016Updated 10 years ago
- Logic design, schematics and code for 16-bit TTL computer based on 4-bit slice☆11Apr 21, 2025Updated last year
- LatticeMico32 soft processor☆105Oct 10, 2014Updated 12 years ago
- Processing Unit with RISCV-32 / RISCV-64 / RISCV-128☆20Oct 19, 2026Updated 2 weeks ago
- An FPGA microcontroller that natively executes LISP☆96Jan 22, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- SoC design for Milkymist One - LM32, DDR SDRAM, 2D TMU, PFPU☆155Feb 18, 2014Updated 12 years ago
- A reconfigurable and extensible VLIW processor implemented in VHDL☆44Mar 14, 2015Updated 11 years ago
- Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).☆36Jul 10, 2016Updated 10 years ago
- An Example implementation of Open Source Graphics Accelerator, (A fixed point, fixed function pipeline GPU)☆75Jun 7, 2012Updated 14 years ago
- Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project☆158Oct 12, 2026Updated 2 weeks ago
- FPGA Many-core Processor Implementation☆11Nov 27, 2024Updated last year
- Linux-capable superscalar out-of-order RISC core (with Cache& MMU) and SoC, having been verified on Xilinx Kintex-7 FPGA.☆56Aug 14, 2024Updated 2 years ago