harvard-acc / ALADDINLinks
A pre-RTL, power-performance model for fixed-function accelerators
☆177Updated last year
Alternatives and similar repositories for ALADDIN
Users that are interested in ALADDIN are comparing it to the libraries listed below
Sorting:
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆239Updated 2 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆129Updated 5 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆110Updated 2 years ago
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆190Updated 4 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆64Updated 3 years ago
- Tool for optimize CNN blocking☆94Updated 5 years ago
- ☆92Updated last year
- STONNE: A Simulation Tool for Neural Networks Engines☆135Updated last month
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆76Updated 6 years ago
- Fast and accurate DRAM power and energy estimation tool☆168Updated this week
- CGRA Compilation Framework☆84Updated 2 years ago
- Release of stream-specialization software/hardware stack.☆121Updated 2 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆146Updated 2 months ago
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆221Updated last year
- AutoSA: Polyhedral-Based Systolic Array Compiler☆221Updated 2 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆51Updated 6 years ago
- RTL implementation of Flex-DPE.☆107Updated 5 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆166Updated last year
- A DSL for Systolic Arrays☆80Updated 6 years ago
- Explore the energy-efficient dataflow scheduling for neural networks.☆225Updated 4 years ago
- gem5 repository to study chiplet-based systems☆77Updated 6 years ago
- DRAMSim2: A cycle accurate DRAM simulator☆274Updated 4 years ago
- MAERI public release☆31Updated 3 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆82Updated last year
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆205Updated 2 years ago
- An Open-Source Tool for CGRA Accelerators☆67Updated 3 months ago
- NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)☆117Updated 6 years ago
- RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.☆173Updated this week
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆154Updated 2 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆135Updated last month