Alternatives and similar repositories for SCALE-Sim

Users that are interested in SCALE-Sim are comparing it to the libraries listed below

• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆147Updated 3 months ago
• maestro-project / maestro
  An analytical cost model evaluating DNN mappings (dataflows and tiling).
  ☆225Updated last year
• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆151Updated this week
• NVlabs / timeloop
  Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.
  ☆416Updated last month
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆138Updated 2 months ago
• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆222Updated 2 years ago
• KULeuven-MICAS / zigzag
  HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators
  ☆157Updated last week
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆109Updated 5 years ago
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆146Updated 6 months ago
• ARM-software / SCALE-Sim
  ☆361Updated 2 years ago
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆89Updated 4 months ago
• SET-Scheduling-Project / SET-ISCA2023
  The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
  ☆69Updated 5 months ago
• harvard-acc / gem5-aladdin
  End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.
  ☆242Updated 2 years ago
• zhaijw18 / mcpat-calib-public
  A RISC-V BOOM Microarchitecture Power Modeling Framework
  ☆28Updated 2 years ago
• pku-liang / Sanger
  A co-design architecture on sparse attention
  ☆51Updated 4 years ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆59Updated 2 weeks ago
• cornell-zhang / allo
  Allo: A Programming Model for Composable Accelerator Design
  ☆272Updated this week
• SAITPublic / PIMSimulator
  Processing-In-Memory (PIM) Simulator
  ☆183Updated 8 months ago
• harvard-acc / smaug
  SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin
  ☆112Updated 2 years ago
• UIUC-ChenLab / scalehls
  A scalable High-Level Synthesis framework on MLIR
  ☆273Updated last year
• Accelergy-Project / timeloop-accelergy-exercises
  Exercises for exploring the Fibertree, Timeloop and Accelergy tools
  ☆102Updated 4 months ago
• lixixi-jook / PIMSYN-NN
  An Automatic Synthesis Tool for PIM-based CNN Accelerators.
  ☆14Updated last year
• aliemo / transfomers-silicon-research
  Research and Materials on Hardware implementation of Transformer Model
  ☆279Updated 6 months ago
• wangxy-2000 / pimsim-nn
  ☆56Updated last year
• scalesim-project / scale-sim-v3
  ☆41Updated 2 weeks ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆58Updated last month
• KULeuven-MICAS / DeFiNES
  A framework for fast exploration of the depth-first scheduling space for DNN accelerators
  ☆40Updated 2 years ago
• groupsada / DeepBurning
  Automatic generation of FPGA-based learning accelerators for the neural network family
  ☆67Updated 5 years ago
• CMU-SAFARI / ramulator2
  Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and …
  ☆369Updated last month
• taoyilee / clacc
  Deep Learning Accelerator (Convolution Neural Networks)
  ☆191Updated 7 years ago