scalesim-project / SCALE-SimLinks
Repository to host and maintain SCALE-Sim code
☆346Updated last month
Alternatives and similar repositories for SCALE-Sim
Users that are interested in SCALE-Sim are comparing it to the libraries listed below
Sorting:
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆149Updated 4 months ago
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆231Updated last year
- Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.☆418Updated 2 months ago
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆158Updated last month
- STONNE: A Simulation Tool for Neural Networks Engines☆138Updated 3 months ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆224Updated 2 years ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆155Updated this week
- RTL implementation of Flex-DPE.☆112Updated 5 years ago
- ☆365Updated 2 years ago
- Processing-In-Memory (PIM) Simulator☆193Updated 9 months ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆149Updated 7 months ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆63Updated last month
- An Automatic Synthesis Tool for PIM-based CNN Accelerators.☆16Updated last year
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆246Updated 2 years ago
- Exercises for exploring the Fibertree, Timeloop and Accelergy tools☆104Updated 5 months ago
- A scalable High-Level Synthesis framework on MLIR☆275Updated last year
- Allo: A Programming Model for Composable Accelerator Design☆279Updated last week
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆113Updated 2 years ago
- A reading list for SRAM-based Compute-In-Memory (CIM) research.☆84Updated 3 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆93Updated 4 months ago
- A co-design architecture on sparse attention☆52Updated 4 years ago
- Research and Materials on Hardware implementation of Transformer Model☆283Updated 6 months ago
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆29Updated 2 years ago
- BookSim 2.0☆361Updated last year
- Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and …☆395Updated 2 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆73Updated 6 months ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆64Updated 6 months ago
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆208Updated 2 years ago
- ☆71Updated 7 months ago
- ☆117Updated 5 years ago