umd-memsys / DRAMSim2
DRAMSim2: A cycle accurate DRAM simulator
☆270Updated 4 years ago
Alternatives and similar repositories for DRAMSim2:
Users that are interested in DRAMSim2 are comparing it to the libraries listed below
- DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator☆361Updated 8 months ago
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆183Updated 4 years ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆232Updated 2 years ago
- A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, …☆630Updated last year
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆159Updated 2 years ago
- BookSim 2.0☆323Updated 10 months ago
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆198Updated 2 years ago
- SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. T…☆130Updated last year
- Fast and accurate DRAM power and energy estimation tool☆156Updated this week
- DRAMSys a SystemC TLM-2.0 based DRAM simulator.☆258Updated last month
- Official repository of the Arm Research Starter Kit on System Modeling using gem5☆114Updated last year
- gem5 Tips & Tricks☆68Updated 5 years ago
- An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model☆449Updated 10 months ago
- Comment on the rocket-chip source code☆179Updated 6 years ago
- Learning gem5 is a work-in-progress book to help gem5 users get started using gem5.☆181Updated 2 years ago
- Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and …☆322Updated 3 weeks ago
- A pre-RTL, power-performance model for fixed-function accelerators☆174Updated last year
- A fast and scalable x86-64 multicore simulator☆354Updated last year
- PrIM (Processing-In-Memory benchmarks) is the first benchmark suite for a real-world processing-in-memory (PIM) architecture. PrIM is dev…☆155Updated 11 months ago
- Benchmarks for Accelerator Design and Customized Architectures☆121Updated 5 years ago
- Virtual Platform for NVDLA☆143Updated 6 years ago
- Joint HPS and ETH Repository to work towards open sourcing Scarab and Ramulator☆76Updated 11 months ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆151Updated last year
- A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical pa…☆72Updated 7 months ago
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆266Updated 5 months ago
- The Sniper Multi-Core Simulator☆126Updated 5 months ago
- A heterogeneous architecture timing model simulator.☆152Updated 4 months ago
- ☆80Updated this week
- ☆319Updated 7 months ago
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆149Updated 2 years ago