DRAMSim2: A cycle accurate DRAM simulator
☆306Nov 11, 2020Updated 5 years ago
Alternatives and similar repositories for DRAMSim2
Users that are interested in DRAMSim2 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator☆524Aug 3, 2024Updated 2 years ago
- A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, …☆718Jul 24, 2026Updated 3 months ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆265Oct 6, 2022Updated 4 years ago
- Fast and accurate DRAM power and energy estimation tool☆221Sep 7, 2026Updated last month
- PTLsim and QEMU based Computer Architecture Research Simulator☆131Feb 13, 2022Updated 4 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- BookSim 2.0☆484Jun 24, 2024Updated 2 years ago
- Update: we've moved our code to a new place! This fork is to maintain page references. New repo:☆10Aug 21, 2019Updated 7 years ago
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆221Apr 18, 2023Updated 3 years ago
- A fast and scalable x86-64 multicore simulator☆403Nov 27, 2023Updated 2 years ago
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆236Aug 8, 2020Updated 6 years ago
- ☆386May 11, 2023Updated 3 years ago
- A pre-RTL, power-performance model for fixed-function accelerators☆192Jan 17, 2024Updated 2 years ago
- Processing-In-Memory (PIM) Simulator☆257Dec 12, 2024Updated last year
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆47Jul 28, 2017Updated 9 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model☆582Jun 25, 2024Updated 2 years ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆205Oct 1, 2022Updated 4 years ago
- Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and …☆700Updated this week
- Hybrid Memory Cube Simulation & Research Infrastructure☆18Jun 9, 2025Updated last year
- A heterogeneous architecture timing model simulator.☆192Sep 7, 2026Updated last month
- The official repository for the gem5 computer-system architecture simulator.☆2,904Updated this week
- Repository to host and maintain SCALE-Sim code☆540Jun 28, 2026Updated 4 months ago
- A simple cycle-accurate DaDianNao simulator☆13Mar 27, 2019Updated 7 years ago
- Simulator of a memory controller to connect DRAMSim and FlashDIMMSim into one unified memory☆18Apr 4, 2024Updated 2 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Replace original DRAM model in GPGPU-sim with Ramulator DRAM model☆22Dec 10, 2018Updated 7 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆115Jan 4, 2023Updated 3 years ago
- This is the top-level repository for the Accel-Sim framework.☆724Updated this week
- GPGPU-Sim provides a detailed simulation model of contemporary NVIDIA GPUs running CUDA and/or OpenCL workloads. It includes support for…☆1,762Oct 3, 2026Updated 3 weeks ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆68Sep 24, 2021Updated 5 years ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆49May 21, 2022Updated 4 years ago
- The source code for GPGPUSim+Ramulator simulator. In this version, GPGPUSim uses Ramulator to simulate the DRAM. This simulator is used t…☆64Sep 30, 2019Updated 7 years ago
- Source code for the architectural and circuit-level simulators used for modeling the CROW (Copy-ROW DRAM) mechanism proposed in our ISCA …☆18Aug 2, 2019Updated 7 years ago
- Manycore platform Simulation tool for NoC-based platform at a Transactional Level Modeling level☆10Aug 30, 2016Updated 10 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility☆1,058Updated this week
- DRAMSys a SystemC TLM-2.0 based DRAM simulator.☆407Oct 23, 2026Updated last week
- ☆13Mar 14, 2023Updated 3 years ago
- NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories☆98Jul 23, 2019Updated 7 years ago
- Graph accelerator on FPGAs and ASICs☆11Aug 16, 2018Updated 8 years ago
- SoftMC is an experimental FPGA-based memory controller design that can be used to develop tests for DDR3 SODIMMs using a C++ based API. T…☆154Aug 24, 2023Updated 3 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆179May 26, 2025Updated last year