breagen / MachSuiteLinks
Benchmarks for Accelerator Design and Customized Architectures
☆129Updated 5 years ago
Alternatives and similar repositories for MachSuite
Users that are interested in MachSuite are comparing it to the libraries listed below
Sorting:
- CGRA Compilation Framework☆84Updated 2 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆166Updated last year
- ☆86Updated last year
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆76Updated 6 years ago
- ☆92Updated last year
- A pre-RTL, power-performance model for fixed-function accelerators☆177Updated last year
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆154Updated 2 years ago
- An integrated CGRA design framework☆90Updated 4 months ago
- Fast and accurate DRAM power and energy estimation tool☆168Updated this week
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆190Updated 4 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆64Updated 3 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆135Updated last month
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆239Updated 2 years ago
- gem5 repository to study chiplet-based systems☆77Updated 6 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆122Updated 2 years ago
- Release of stream-specialization software/hardware stack.☆121Updated 2 years ago
- RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.☆173Updated this week
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆94Updated 10 months ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆221Updated 2 years ago
- ☆58Updated 2 years ago
- ☆56Updated 4 months ago
- PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration☆48Updated 3 years ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- An Open-Source Tool for CGRA Accelerators☆67Updated 3 months ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆60Updated 9 months ago
- A DSL for Systolic Arrays☆80Updated 6 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆68Updated last year
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆110Updated 2 years ago
- ☆59Updated this week
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆68Updated last year