tukl-msd / DRAMPowerLinks
Fast and accurate DRAM power and energy estimation tool
☆188Updated this week
Alternatives and similar repositories for DRAMPower
Users that are interested in DRAMPower are comparing it to the libraries listed below
Sorting:
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆209Updated 5 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆136Updated 5 years ago
- ☆108Updated last year
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆82Updated 6 years ago
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆255Updated 3 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆74Updated last year
- AutoSA: Polyhedral-Based Systolic Array Compiler☆236Updated 3 years ago
- A pre-RTL, power-performance model for fixed-function accelerators☆183Updated last year
- CGRA Compilation Framework☆91Updated 2 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆70Updated 2 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆150Updated this week
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆165Updated 2 years ago
- A speculative mechanism to accelerate long-latency off-chip load requests by removing on-chip cache access latency from their critical pa…☆76Updated 4 months ago
- gem5 repository to study chiplet-based systems☆85Updated 6 years ago
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.☆176Updated 4 months ago
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆40Updated 6 years ago
- Release of stream-specialization software/hardware stack.☆120Updated 2 years ago
- DRAMSim2: A cycle accurate DRAM simulator☆294Updated 5 years ago
- HLS-based Graph Processing Framework on FPGAs☆150Updated 3 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs (FPGA'18)☆169Updated 2 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆66Updated 4 years ago
- Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4…☆118Updated 7 months ago
- DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is inte…☆84Updated 2 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆114Updated 3 years ago
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆79Updated last week
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆162Updated this week
- gem5 Tips & Tricks☆70Updated 5 years ago
- An Open-Source Tool for CGRA Accelerators☆81Updated 4 months ago
- ☆68Updated 8 years ago