Alternatives and similar repositories for booksim2

Users that are interested in booksim2 are comparing it to the libraries listed below

• harvard-acc / gem5-aladdin
  End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.
  ☆255Updated 3 years ago
• HewlettPackard / mcpat
  An integrated power, area, and timing modeling framework for multicore and manycore architectures
  ☆208Updated 5 years ago
• umd-memsys / DRAMsim3
  DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator
  ☆435Updated last year
• HewlettPackard / cacti
  An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model
  ☆522Updated last year
• tukl-msd / DRAMSys
  DRAMSys a SystemC TLM-2.0 based DRAM simulator.
  ☆328Updated 3 weeks ago
• davidepatti / noxim
  Network on Chip Simulator
  ☆299Updated 2 months ago
• CMU-SAFARI / ramulator2
  Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and …
  ☆470Updated 2 months ago
• vineodd / PIMSim
  PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.
  ☆213Updated 2 years ago
• CMU-SAFARI / ramulator-pim
  A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…
  ☆179Updated 3 years ago
• umd-memsys / DRAMSim2
  DRAMSim2: A cycle accurate DRAM simulator
  ☆294Updated 5 years ago
• scalesim-project / SCALE-Sim
  Repository to host and maintain SCALE-Sim code
  ☆404Updated 3 weeks ago
• NVlabs / matchlib
  SystemC/C++ library of commonly-used hardware functions and components for HLS.
  ☆290Updated 2 months ago
• CMU-SAFARI / ramulator
  A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, …
  ☆677Updated 2 years ago
• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆236Updated 3 years ago
• harvard-acc / ALADDIN
  A pre-RTL, power-performance model for fixed-function accelerators
  ☆183Updated last year
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆149Updated this week
• UIUC-ChenLab / scalehls
  A scalable High-Level Synthesis framework on MLIR
  ☆286Updated last year
• pnnl / OpenCGRA
  OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
  ☆165Updated 2 years ago
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆188Updated this week
• UCLA-VAST / tapa
  TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.
  ☆176Updated 4 months ago
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆135Updated 5 years ago
• SEAL-UCSB / NVSim
  NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)
  ☆129Updated 7 years ago
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆85Updated 6 years ago
• maestro-project / maestro
  An analytical cost model evaluating DNN mappings (dataflows and tiling).
  ☆244Updated last year
• SAITPublic / PIMSimulator
  Processing-In-Memory (PIM) Simulator
  ☆215Updated last year
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆333Updated 11 months ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆145Updated 6 months ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆73Updated last year
• OpenXiangShan / GEM5
  ☆122Updated this week
• sparcians / map
  Modeling Architectural Platform
  ☆215Updated last week